Home
last modified time | relevance | path

Searched refs:btr (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/display/modules/freesync/
H A Dfreesync.c271 in_out_vrr->max_duration_in_us - in_out_vrr->btr.margin_in_us; in apply_below_the_range()
274 if ((last_render_time_in_us + in_out_vrr->btr.margin_in_us / 2) < max_render_time_in_us) { in apply_below_the_range()
276 if (in_out_vrr->btr.btr_active) { in apply_below_the_range()
277 in_out_vrr->btr.frame_counter = 0; in apply_below_the_range()
278 in_out_vrr->btr.btr_active = false; in apply_below_the_range()
280 } else if (last_render_time_in_us > (max_render_time_in_us + in_out_vrr->btr.margin_in_us / 2)) { in apply_below_the_range()
282 if (!in_out_vrr->btr.btr_active) in apply_below_the_range()
283 in_out_vrr->btr.btr_active = true; in apply_below_the_range()
287 if (!in_out_vrr->btr.btr_active) { in apply_below_the_range()
288 in_out_vrr->btr.inserted_duration_in_us = 0; in apply_below_the_range()
[all …]
/linux/drivers/ata/
H A Dpata_serverworks.c303 u8 btr; in serverworks_fixup_csb() local
341 pci_read_config_byte(pdev, 0x5A, &btr); in serverworks_fixup_csb()
342 btr &= ~0x40; in serverworks_fixup_csb()
344 btr |= 0x2; in serverworks_fixup_csb()
346 btr |= (pdev->revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2; in serverworks_fixup_csb()
347 pci_write_config_byte(pdev, 0x5A, btr); in serverworks_fixup_csb()
349 return btr; in serverworks_fixup_csb()
354 u8 btr; in serverworks_fixup_ht1000() local
356 pci_read_config_byte(pdev, 0x5A, &btr); in serverworks_fixup_ht1000()
357 btr &= ~0x40; in serverworks_fixup_ht1000()
[all …]
/linux/drivers/net/can/esd/
H A Desdacc.c363 u32 btr; in acc_set_bittiming() local
374 btr = FIELD_PREP(ACC_REG_BTR_FD_MASK_TSEG1, bt->phase_seg1 + bt->prop_seg - 1); in acc_set_bittiming()
375 btr |= FIELD_PREP(ACC_REG_BTR_FD_MASK_TSEG2, bt->phase_seg2 - 1); in acc_set_bittiming()
376 btr |= FIELD_PREP(ACC_REG_BTR_FD_MASK_SJW, bt->sjw - 1); in acc_set_bittiming()
380 acc_write32(priv->core, ACC_CORE_OF_BTR, btr); in acc_set_bittiming()
383 brp, btr, fbtr); in acc_set_bittiming()
391 btr = FIELD_PREP(ACC_REG_BTR_CL_MASK_TSEG1, bt->phase_seg1 + bt->prop_seg - 1); in acc_set_bittiming()
392 btr |= FIELD_PREP(ACC_REG_BTR_CL_MASK_TSEG2, bt->phase_seg2 - 1); in acc_set_bittiming()
393 btr |= FIELD_PREP(ACC_REG_BTR_CL_MASK_SJW, bt->sjw - 1); in acc_set_bittiming()
397 acc_write32(priv->core, ACC_CORE_OF_BTR, btr); in acc_set_bittiming()
[all …]
/linux/arch/x86/include/asm/
H A Dsync_bitops.h52 asm volatile("lock; " __ASM_SIZE(btr) " %1,%0" in sync_clear_bit()
98 return GEN_BINARY_RMWcc("lock; " __ASM_SIZE(btr), *addr, c, "Ir", nr); in sync_test_and_clear_bit()
/linux/drivers/memory/
H A Dstm32-fmc2-ebi.c203 u32 btr[FMC2_MAX_EBI_CE]; member
426 u32 bcr, btr, clk_period; in stm32_fmc2_ebi_ns_to_clk_period() local
434 ret = regmap_read(ebi->regmap, FMC2_BTR1, &btr); in stm32_fmc2_ebi_ns_to_clk_period()
436 ret = regmap_read(ebi->regmap, FMC2_BTR(cs), &btr); in stm32_fmc2_ebi_ns_to_clk_period()
440 clk_period = FIELD_GET(FMC2_BTR_CLKDIV, btr) + 1; in stm32_fmc2_ebi_ns_to_clk_period()
449 u32 cfgr, btr, clk_period; in stm32_fmc2_ebi_mp25_ns_to_clk_period() local
459 ret = regmap_read(ebi->regmap, FMC2_BTR(cs), &btr); in stm32_fmc2_ebi_mp25_ns_to_clk_period()
463 clk_period = FIELD_GET(FMC2_BTR_CLKDIV, btr) + 1; in stm32_fmc2_ebi_mp25_ns_to_clk_period()
516 u32 btr_mask, btr = 0; in stm32_fmc2_ebi_set_trans_type() local
547 btr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_A); in stm32_fmc2_ebi_set_trans_type()
[all …]
/linux/drivers/net/can/ctucanfd/
H A Dctucanfd_base.c209 u32 btr = 0; in ctucan_set_btr() local
234 btr = FIELD_PREP(REG_BTR_PROP, prop_seg); in ctucan_set_btr()
235 btr |= FIELD_PREP(REG_BTR_PH1, phase_seg1); in ctucan_set_btr()
236 btr |= FIELD_PREP(REG_BTR_PH2, bt->phase_seg2); in ctucan_set_btr()
237 btr |= FIELD_PREP(REG_BTR_BRP, bt->brp); in ctucan_set_btr()
238 btr |= FIELD_PREP(REG_BTR_SJW, bt->sjw); in ctucan_set_btr()
240 ctucan_write32(priv, CTUCANFD_BTR, btr); in ctucan_set_btr()
242 btr = FIELD_PREP(REG_BTR_FD_PROP_FD, prop_seg); in ctucan_set_btr()
243 btr |= FIELD_PREP(REG_BTR_FD_PH1_FD, phase_seg1); in ctucan_set_btr()
244 btr |= FIELD_PREP(REG_BTR_FD_PH2_FD, bt->phase_seg2); in ctucan_set_btr()
[all …]
/linux/drivers/gpu/drm/amd/display/modules/inc/
H A Dmod_freesync.h55 bool btr; member
105 struct mod_vrr_params_btr btr; member
/linux/drivers/net/ethernet/stmicro/stmmac/
H A Dstmmac_est.c35 ret |= est_write(est_addr, EST_BTR_LOW, cfg->btr[0], false); in est_configure()
36 ret |= est_write(est_addr, EST_BTR_HIGH, cfg->btr[1], false); in est_configure()
H A Dstmmac_ptp.c102 priv->est->btr[0] = (u32)time.tv_nsec; in stmmac_adjust_time()
103 priv->est->btr[1] = (u32)time.tv_sec; in stmmac_adjust_time()
H A Dstmmac.h255 u32 btr[2]; member
H A Dstmmac_tc.c1043 priv->est->btr[0] = (u32)time.tv_nsec; in tc_taprio_configure()
1044 priv->est->btr[1] = (u32)time.tv_sec; in tc_taprio_configure()
/linux/arch/x86/entry/
H A Dcalling.h197 btr \scratch_reg, THIS_CPU_user_pcid_flush_mask
267 btr \scratch_reg, THIS_CPU_user_pcid_flush_mask
/linux/drivers/net/can/usb/peak_usb/
H A Dpcan_usb_pro.h173 struct pcan_usb_pro_btr btr; member
/linux/arch/x86/kernel/
H A Dverify_cpu.S127 btr $15,%eax # enable SSE
/linux/drivers/net/can/
H A Dbxcan.c159 u32 btr; /* 0x1c - bit timing*/ member
684 bxcan_rmw(priv, &regs->btr, BXCAN_BTR_SILM | BXCAN_BTR_LBKM | in bxcan_chip_start()
/linux/arch/x86/kvm/
H A Demulate.c1042 FASTOP2W(btr);