Searched refs:boot_snapshot (Results 1 – 5 of 5) sorted by relevance
310 clk_mgr_base->clks.dispclk_khz = clk_mgr_base->boot_snapshot.dispclk; in dcn60_build_update_display_clocks_sequence()313 clk_mgr_base->clks.dppclk_khz = clk_mgr_base->boot_snapshot.dppclk; in dcn60_build_update_display_clocks_sequence()475 dtb_ref_clk_khz = clk_mgr_base->boot_snapshot.dtbclk; in dcn60_get_dtb_ref_freq_khz()1632 dcn60_dump_clk_registers(&clk_mgr->base.boot_snapshot, &clk_mgr->base, &log_info); in dcn60_clk_mgr_construct()1635 clk_mgr->base.clks.ref_dtbclk_khz != clk_mgr->base.boot_snapshot.dtbclk) { in dcn60_clk_mgr_construct()1636 clk_mgr->base.clks.ref_dtbclk_khz = clk_mgr->base.boot_snapshot.dtbclk; in dcn60_clk_mgr_construct()1639 if (clk_mgr->base.boot_snapshot.dprefclk != 0) in dcn60_clk_mgr_construct()1640 clk_mgr->base.dprefclk_khz = clk_mgr->base.boot_snapshot.dprefclk; in dcn60_clk_mgr_construct()
765 dcn35_save_clk_registers(&clk_mgr->boot_snapshot, clk_mgr_dcn35); in dcn35_init_clocks()767 clk_mgr->clks.ref_dtbclk_khz = clk_mgr->boot_snapshot.dtbclk * 10; in dcn35_init_clocks()768 if (clk_mgr->boot_snapshot.dtbclk > 59000) { in dcn35_init_clocks()1330 clk_mgr->base.boot_snapshot.dispclk; in dcn35_get_max_clock_khz()1335 clk_mgr->base.boot_snapshot.dppclk; in dcn35_get_max_clock_khz()1340 clk_mgr->base.boot_snapshot.dispclk / 3; in dcn35_get_max_clock_khz()1497 dcn35_save_clk_registers(&clk_mgr->base.base.boot_snapshot, clk_mgr); in dcn35_clk_mgr_construct()
38 static int __init boot_snapshot(char *str) in boot_snapshot() function44 __setup("ftrace_boot_snapshot", boot_snapshot);
742 dcn31_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, in dcn31_clk_mgr_construct()
859 dcn314_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, in dcn314_clk_mgr_construct()