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Searched refs:blackout_us (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/
H A Ddml2_pmo_dcn6_stage_optimizers.c127 double *blackout_us, in dcn6_get_params_for_pstate_type() argument
133 *blackout_us = pmo->utm_soc_bb->power_management_parameters.dram_clk_change_blackout_us; in dcn6_get_params_for_pstate_type()
138 *blackout_us = pmo->utm_soc_bb->power_management_parameters.fclk_change_blackout_us; in dcn6_get_params_for_pstate_type()
143 *blackout_us = math_max2( in dcn6_get_params_for_pstate_type()
151 *blackout_us = math_max2( in dcn6_get_params_for_pstate_type()
159 *blackout_us = 0.0; in dcn6_get_params_for_pstate_type()
682 double blackout_us, in dcn6_build_pstate_meta_per_stream() argument
738 …stream_pstate_meta->blackout_otg_vlines = (int)math_ceil(blackout_us / stream_pstate_meta->otg_vli… in dcn6_build_pstate_meta_per_stream()
758 blackout_us - in dcn6_build_pstate_meta_per_stream()
920 …te_type(pmo, worksheet, dml2_pstate_type_uclk, &s->allow_delay_us, &s->blackout_us, &s->watermark_… in dml2_pmo_dcn6_stage_optimizer_uclk_pstate_init()
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/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn6_calcs_dchub.c1097 double blackout_us, in dcn6_calculate_watermarks_and_dram_speed_change_support()
1106 (vactive_margin_us > 0 && reserved_vblank_us >= blackout_us)) in dcn6_calculate_watermarks_and_dram_speed_change_support()
1110 else if (reserved_vblank_us >= blackout_us) in dcn6_calculate_watermarks_and_dram_speed_change_support()
1115 (vactive_margin_us > 0 && reserved_vblank_us >= blackout_us)) in dcn6_calculate_watermarks_and_dram_speed_change_support()
1120 reserved_vblank_us >= blackout_us) { in dcn6_calculate_watermarks_and_dram_speed_change_support()
1730 const double blackout_us, in dcn6_calculate_pstate_schedule_admissibility()
1751 blackout_otg_vlines = (int)(math_ceil(blackout_us / otg_vline_time_us[k])); in dcn6_calculate_pstate_schedule_admissibility()
1045 dcn6_calculate_pstate_support_method(enum dml2_pstate_method method,double peak_vactive_p_vblank_latency_hiding_margin_us,double vactive_margin_us,double reserved_vblank_us,double blackout_us,bool all_streams_blanked,enum dml2_pstate_change_support * surface_pstate_change_support) dcn6_calculate_pstate_support_method() argument
1678 dcn6_calculate_pstate_schedule_windows(int num_active_planes,const unsigned int v_blank_start[DML2_MAX_PLANES],const unsigned int v_blank_end[DML2_MAX_PLANES],const double otg_vline_time_us[DML2_MAX_PLANES],const double det_fill_delay_us[DML2_MAX_PLANES],const double reserved_vblank_us[DML2_MAX_PLANES],const double blackout_us,double allow_start_us[DML2_MAX_PLANES],double allow_end_us[DML2_MAX_PLANES]) dcn6_calculate_pstate_schedule_windows() argument
H A Ddml2_core_dcn5_calcs_dchub.c4188 double blackout_us, in dcn5_calculate_pstate_support_method()
4197 (vactive_margin_us > 0 && reserved_vblank_us >= blackout_us)) in dcn5_calculate_pstate_support_method()
4201 else if (reserved_vblank_us >= blackout_us) in dcn5_calculate_pstate_support_method()
4206 (vactive_margin_us > 0 && reserved_vblank_us >= blackout_us)) in dcn5_calculate_pstate_support_method()
4211 reserved_vblank_us >= blackout_us) { in dcn5_calculate_pstate_support_method()
5289 unsigned int blackout_us;
5297 .blackout_us = 23,
5301 .blackout_us = 10,
5305 .blackout_us = 10,
5309 .blackout_us
4184 dcn5_calculate_pstate_support_method(enum dml2_pstate_method method,double vactive_margin_us,double reserved_vblank_us,double blackout_us,bool all_streams_blanked,enum dml2_pstate_change_support * surface_pstate_change_support) dcn5_calculate_pstate_support_method() argument
5285 unsigned int blackout_us; global() member
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