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Searched refs:best_parent_rate (Results 1 – 25 of 148) sorted by relevance

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/linux/drivers/clk/at91/
H A Dclk-audio-pll.c251 req->rate, req->best_parent_rate); in clk_audio_pll_frac_determine_rate()
258 ret = clk_audio_pll_frac_compute_frac(req->rate, req->best_parent_rate, in clk_audio_pll_frac_determine_rate()
263 req->rate = clk_audio_pll_fout(req->best_parent_rate, nd, fracr); in clk_audio_pll_frac_determine_rate()
278 unsigned long best_parent_rate; in clk_audio_pll_pad_determine_rate() local
286 req->rate, req->best_parent_rate); in clk_audio_pll_pad_determine_rate()
306 best_parent_rate = clk_hw_round_rate(pclk, in clk_audio_pll_pad_determine_rate()
308 tmp_rate = best_parent_rate / (div * tmp_qd); in clk_audio_pll_pad_determine_rate()
312 req->best_parent_rate = best_parent_rate; in clk_audio_pll_pad_determine_rate()
319 __func__, best_rate, best_parent_rate); in clk_audio_pll_pad_determine_rate()
331 unsigned long best_parent_rate = 0; in clk_audio_pll_pmc_determine_rate() local
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H A Dclk-smd.c46 if (req->rate >= req->best_parent_rate) { in at91sam9x5_clk_smd_determine_rate()
47 req->rate = req->best_parent_rate; in at91sam9x5_clk_smd_determine_rate()
51 div = req->best_parent_rate / req->rate; in at91sam9x5_clk_smd_determine_rate()
53 req->rate = req->best_parent_rate / (SMD_MAX_DIV + 1); in at91sam9x5_clk_smd_determine_rate()
57 bestrate = req->best_parent_rate / div; in at91sam9x5_clk_smd_determine_rate()
58 tmp = req->best_parent_rate / (div + 1); in at91sam9x5_clk_smd_determine_rate()
H A Dclk-plldiv.c41 if (req->rate > req->best_parent_rate) { in clk_plldiv_determine_rate()
42 req->rate = req->best_parent_rate; in clk_plldiv_determine_rate()
47 div = req->best_parent_rate / 2; in clk_plldiv_determine_rate()
54 if (req->rate - div < req->best_parent_rate - req->rate) { in clk_plldiv_determine_rate()
60 req->rate = req->best_parent_rate; in clk_plldiv_determine_rate()
H A Dclk-h32mx.c48 if (req->rate > req->best_parent_rate) { in clk_sama5d4_h32mx_determine_rate()
49 req->rate = req->best_parent_rate; in clk_sama5d4_h32mx_determine_rate()
53 div = req->best_parent_rate / 2; in clk_sama5d4_h32mx_determine_rate()
60 if (req->rate - div < req->best_parent_rate - req->rate) { in clk_sama5d4_h32mx_determine_rate()
66 req->rate = req->best_parent_rate; in clk_sama5d4_h32mx_determine_rate()
H A Dclk-peripheral.c267 req->best_parent_rate = parent_rate; in clk_sam9x5_peripheral_best_diff()
332 req->best_parent_rate); in clk_sam9x5_peripheral_determine_rate()
345 unsigned long cur_rate = req->best_parent_rate; in clk_sam9x5_peripheral_no_parent_determine_rate()
350 req->rate = req->best_parent_rate; in clk_sam9x5_peripheral_no_parent_determine_rate()
357 cur_rate = req->best_parent_rate >> shift; in clk_sam9x5_peripheral_no_parent_determine_rate()
372 cur_rate = req->best_parent_rate >> shift; in clk_sam9x5_peripheral_no_parent_determine_rate()
/linux/drivers/clk/rockchip/
H A Dclk-half-divider.c36 unsigned long *best_parent_rate, u8 width, in clk_half_divider_bestdiv() argument
41 unsigned long parent_rate_saved = *best_parent_rate; in clk_half_divider_bestdiv()
49 parent_rate = *best_parent_rate; in clk_half_divider_bestdiv()
72 *best_parent_rate = parent_rate_saved; in clk_half_divider_bestdiv()
83 *best_parent_rate = parent_rate; in clk_half_divider_bestdiv()
89 *best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), 1); in clk_half_divider_bestdiv()
101 div = clk_half_divider_bestdiv(hw, req->rate, &req->best_parent_rate, in clk_half_divider_determine_rate()
105 req->rate = DIV_ROUND_UP_ULL(((u64)req->best_parent_rate * 2), div * 2 + 3); in clk_half_divider_determine_rate()
/linux/drivers/clk/
H A Dclk-multiplier.c66 unsigned long *best_parent_rate, in __bestmult() argument
70 unsigned long orig_parent_rate = *best_parent_rate; in __bestmult()
97 *best_parent_rate = orig_parent_rate; in __bestmult()
108 *best_parent_rate = parent_rate; in __bestmult()
119 unsigned long factor = __bestmult(hw, req->rate, &req->best_parent_rate, in clk_multiplier_determine_rate()
122 req->rate = req->best_parent_rate * factor; in clk_multiplier_determine_rate()
H A Dclk-divider.c297 unsigned long *best_parent_rate, in clk_divider_bestdiv() argument
303 unsigned long parent_rate_saved = *best_parent_rate; in clk_divider_bestdiv()
311 parent_rate = *best_parent_rate; in clk_divider_bestdiv()
332 *best_parent_rate = parent_rate_saved; in clk_divider_bestdiv()
340 *best_parent_rate = parent_rate; in clk_divider_bestdiv()
346 *best_parent_rate = clk_hw_round_rate(parent, 1); in clk_divider_bestdiv()
359 &req->best_parent_rate, table, width, flags); in divider_determine_rate()
361 req->rate = DIV_ROUND_UP_ULL((u64)req->best_parent_rate, div); in divider_determine_rate()
380 req->best_parent_rate = clk_hw_round_rate(req->best_parent_hw, in divider_ro_determine_rate()
384 req->rate = DIV_ROUND_UP_ULL((u64)req->best_parent_rate, div); in divider_ro_determine_rate()
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H A Dclk-vt8500.c140 divisor = req->best_parent_rate / req->rate; in vt8500_dclk_determine_rate()
143 if (req->rate * divisor < req->best_parent_rate) in vt8500_dclk_determine_rate()
153 req->rate = req->best_parent_rate / divisor; in vt8500_dclk_determine_rate()
608 ret = vt8500_find_pll_bits(req->rate, req->best_parent_rate, in vtwm_pll_determine_rate()
611 round_rate = VT8500_BITS_TO_FREQ(req->best_parent_rate, in vtwm_pll_determine_rate()
615 ret = wm8650_find_pll_bits(req->rate, req->best_parent_rate, in vtwm_pll_determine_rate()
618 round_rate = WM8650_BITS_TO_FREQ(req->best_parent_rate, in vtwm_pll_determine_rate()
622 ret = wm8750_find_pll_bits(req->rate, req->best_parent_rate, in vtwm_pll_determine_rate()
625 round_rate = WM8750_BITS_TO_FREQ(req->best_parent_rate, in vtwm_pll_determine_rate()
629 ret = wm8850_find_pll_bits(req->rate, req->best_parent_rate, in vtwm_pll_determine_rate()
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H A Dclk-fractional-divider.c161 if (!req->rate || (!clk_hw_can_set_rate_parent(hw) && req->rate >= req->best_parent_rate)) { in clk_fd_determine_rate()
162 req->rate = req->best_parent_rate; in clk_fd_determine_rate()
168 fd->approximation(hw, req->rate, &req->best_parent_rate, &m, &n); in clk_fd_determine_rate()
171 &req->best_parent_rate, in clk_fd_determine_rate()
174 ret = (u64)req->best_parent_rate * m; in clk_fd_determine_rate()
H A Dclk-versaclock3.c304 if (req->best_parent_rate <= 50000000) { in vc3_pfd_determine_rate()
305 req->rate = req->best_parent_rate; in vc3_pfd_determine_rate()
310 idiv = DIV_ROUND_UP(req->best_parent_rate, req->rate); in vc3_pfd_determine_rate()
319 req->rate = req->best_parent_rate / idiv; in vc3_pfd_determine_rate()
405 vc3->div_int = req->rate / req->best_parent_rate; in vc3_pll_determine_rate()
409 req->rate = req->best_parent_rate * 0x7ff; in vc3_pll_determine_rate()
412 div_frc = req->rate % req->best_parent_rate; in vc3_pll_determine_rate()
416 div64_ul(div_frc, req->best_parent_rate), in vc3_pll_determine_rate()
418 req->rate = (req->best_parent_rate * in vc3_pll_determine_rate()
421 req->rate = req->best_parent_rate * vc3->div_int; in vc3_pll_determine_rate()
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H A Dclk-cdce706.c195 __func__, req->rate, req->best_parent_rate); in cdce706_pll_determine_rate()
197 rational_best_approximation(req->rate, req->best_parent_rate, in cdce706_pll_determine_rate()
207 res = (u64)req->best_parent_rate * hwd->mul; in cdce706_pll_determine_rate()
303 __func__, rate, req->best_parent_rate); in cdce706_divider_determine_rate()
305 rational_best_approximation(rate, req->best_parent_rate, in cdce706_divider_determine_rate()
350 __func__, req->best_parent_rate, rate * div); in cdce706_divider_determine_rate()
351 req->best_parent_rate = rate * div; in cdce706_divider_determine_rate()
359 req->rate = req->best_parent_rate / div; in cdce706_divider_determine_rate()
431 req->best_parent_rate = req->rate; in cdce706_clkout_determine_rate()
H A Dclk-versaclock5.c310 if ((req->best_parent_rate == req->rate) || ((req->best_parent_rate * 2) == req->rate)) in vc5_dbl_determine_rate()
376 if (req->best_parent_rate <= 50000000) { in vc5_pfd_determine_rate()
377 req->rate = req->best_parent_rate; in vc5_pfd_determine_rate()
382 idiv = DIV_ROUND_UP(req->best_parent_rate, req->rate); in vc5_pfd_determine_rate()
386 req->rate = req->best_parent_rate / idiv; in vc5_pfd_determine_rate()
463 div_int = req->rate / req->best_parent_rate; in vc5_pll_determine_rate()
465 req->rate = req->best_parent_rate * 0xfff; in vc5_pll_determine_rate()
468 div_frc = req->rate % req->best_parent_rate; in vc5_pll_determine_rate()
470 do_div(div_frc, req->best_parent_rate); in vc5_pll_determine_rate()
475 req->rate = (req->best_parent_rate * div_int) + ((req->best_parent_rate * div_frc) >> 24); in vc5_pll_determine_rate()
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H A Dclk-composite.c53 req->best_parent_rate = clk_hw_get_rate(parent_hw); in clk_composite_determine_rate_for_parent()
59 &req->best_parent_rate); in clk_composite_determine_rate_for_parent()
102 req->best_parent_rate = tmp_req.best_parent_rate; in clk_composite_determine_rate()
130 req->best_parent_rate = tmp_req.best_parent_rate; in clk_composite_determine_rate()
/linux/drivers/clk/actions/
H A Dowl-factor.c68 unsigned long *best_parent_rate) in owl_clk_val_best() argument
72 unsigned long parent_rate_saved = *best_parent_rate; in owl_clk_val_best()
79 parent_rate = *best_parent_rate; in owl_clk_val_best()
96 *best_parent_rate = parent_rate_saved; in owl_clk_val_best()
106 *best_parent_rate = parent_rate; in owl_clk_val_best()
112 *best_parent_rate = clk_hw_round_rate( in owl_clk_val_best()
140 req->rate, &req->best_parent_rate); in owl_factor_determine_rate()
/linux/drivers/clk/imx/
H A Dclk-pfdv2.c107 req->best_parent_rate in clk_pfdv2_determine_rate()
110 unsigned long best_parent_rate = req->best_parent_rate; in clk_pfdv2_determine_rate() local
132 best_parent_rate = parent_rates[i]; in clk_pfdv2_determine_rate()
136 req->best_parent_rate = best_parent_rate; in clk_pfdv2_determine_rate()
/linux/drivers/clk/tegra/
H A Dclk-tegra-super-cclk.c92 .best_parent_rate = pllp_rate, in cclk_super_determine_rate()
98 pllp_rate = parent.best_parent_rate; in cclk_super_determine_rate()
102 req->best_parent_rate = pllp_rate; in cclk_super_determine_rate()
107 req->best_parent_rate = rate; in cclk_super_determine_rate()
/linux/drivers/clk/ti/
H A Ddivider.c169 unsigned long *best_parent_rate) in ti_clk_divider_bestdiv() argument
174 unsigned long parent_rate_saved = *best_parent_rate; in ti_clk_divider_bestdiv()
182 parent_rate = *best_parent_rate; in ti_clk_divider_bestdiv()
204 *best_parent_rate = parent_rate_saved; in ti_clk_divider_bestdiv()
213 *best_parent_rate = parent_rate; in ti_clk_divider_bestdiv()
219 *best_parent_rate = in ti_clk_divider_bestdiv()
230 div = ti_clk_divider_bestdiv(hw, req->rate, &req->best_parent_rate); in ti_clk_divider_determine_rate()
232 req->rate = DIV_ROUND_UP(req->best_parent_rate, div); in ti_clk_divider_determine_rate()
/linux/drivers/clk/bcm/
H A Dclk-iproc-asiu.c106 if (req->rate == 0 || req->best_parent_rate == 0) in iproc_asiu_clk_determine_rate()
109 if (req->rate == req->best_parent_rate) in iproc_asiu_clk_determine_rate()
112 div = DIV_ROUND_CLOSEST(req->best_parent_rate, req->rate); in iproc_asiu_clk_determine_rate()
114 req->rate = req->best_parent_rate; in iproc_asiu_clk_determine_rate()
119 req->rate = req->best_parent_rate / div; in iproc_asiu_clk_determine_rate()
/linux/drivers/clk/zynqmp/
H A Ddivider.c147 req->rate = DIV_ROUND_UP_ULL((u64)req->best_parent_rate, bestdiv); in zynqmp_clk_divider_determine_rate()
154 req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, in zynqmp_clk_divider_determine_rate()
158 (req->rate % req->best_parent_rate)) in zynqmp_clk_divider_determine_rate()
159 req->best_parent_rate = req->rate; in zynqmp_clk_divider_determine_rate()
/linux/drivers/clk/microchip/
H A Dclk-core.c161 req->rate = calc_best_divided_rate(req->rate, req->best_parent_rate, in pbclk_determine_rate()
382 unsigned long parent_rate, best_parent_rate = 0; in roclk_determine_rate() local
400 roclk_calc_div_trim(req->rate, req->best_parent_rate, &rodiv, &rotrim); in roclk_determine_rate()
403 nearest_rate = roclk_calc_rate(req->best_parent_rate, rodiv, rotrim); in roclk_determine_rate()
408 best_parent_rate = parent_rate; in roclk_determine_rate()
426 clk_hw_get_name(best_parent_clk), best_parent_rate, in roclk_determine_rate()
429 if (req->best_parent_rate) in roclk_determine_rate()
430 req->best_parent_rate = best_parent_rate; in roclk_determine_rate()
670 req->rate = spll_calc_mult_div(pll, req->rate, req->best_parent_rate, in spll_clk_determine_rate()
786 req->rate = calc_best_divided_rate(req->rate, req->best_parent_rate, in sclk_determine_rate()
/linux/drivers/clk/nuvoton/
H A Dclk-ma35d1-pll.c255 if (req->best_parent_rate < PLL_FREF_MIN_FREQ || req->best_parent_rate > PLL_FREF_MAX_FREQ) in ma35d1_clk_pll_determine_rate()
258 ret = ma35d1_pll_find_closest(pll, req->rate, req->best_parent_rate, in ma35d1_clk_pll_determine_rate()
266 pll_freq = ma35d1_calc_smic_pll_freq(reg_ctl[0], req->best_parent_rate); in ma35d1_clk_pll_determine_rate()
276 pll_freq = ma35d1_calc_pll_freq(pll->mode, reg_ctl, req->best_parent_rate); in ma35d1_clk_pll_determine_rate()
/linux/drivers/clk/spacemit/
H A Dccu_mix.c86 req->rate = ccu_factor_recalc_rate(hw, req->best_parent_rate); in ccu_factor_determine_rate()
100 unsigned long *best_parent_rate, in ccu_mix_calc_best_rate() argument
129 *best_parent_rate = parent_rate; in ccu_mix_calc_best_rate()
143 &req->best_parent_rate, in ccu_mix_determine_rate()
/linux/drivers/clk/mstar/
H A Dclk-msc313-cpupll.c146 u32 reg = msc313_cpupll_regforfrequecy(req->rate, req->best_parent_rate); in msc313_cpupll_determine_rate()
147 long rounded = msc313_cpupll_frequencyforreg(reg, req->best_parent_rate); in msc313_cpupll_determine_rate()
154 rounded = msc313_cpupll_frequencyforreg(reg, req->best_parent_rate); in msc313_cpupll_determine_rate()
/linux/drivers/clk/qcom/
H A Dclk-regmap-divider.c30 &req->best_parent_rate, NULL, in div_ro_determine_rate()
41 req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, in div_determine_rate()

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