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Searched refs:bch (Results 1 – 25 of 28) sorted by relevance

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/linux/drivers/mtd/nand/raw/ingenic/
H A Djz4725b_bch.c62 static inline void jz4725b_bch_config_set(struct ingenic_ecc *bch, u32 cfg) in jz4725b_bch_config_set() argument
64 writel(cfg, bch->base + BCH_BHCSR); in jz4725b_bch_config_set()
67 static inline void jz4725b_bch_config_clear(struct ingenic_ecc *bch, u32 cfg) in jz4725b_bch_config_clear() argument
69 writel(cfg, bch->base + BCH_BHCCR); in jz4725b_bch_config_clear()
72 static int jz4725b_bch_reset(struct ingenic_ecc *bch, in jz4725b_bch_reset() argument
78 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4725b_bch_reset()
81 jz4725b_bch_config_clear(bch, 0x1f); in jz4725b_bch_reset()
82 jz4725b_bch_config_set(bch, BCH_BHCR_BCHE); in jz4725b_bch_reset()
85 jz4725b_bch_config_set(bch, BCH_BHCR_BSEL); in jz4725b_bch_reset()
87 jz4725b_bch_config_clear(bch, BCH_BHCR_BSEL); in jz4725b_bch_reset()
[all …]
H A Djz4780_bch.c62 static void jz4780_bch_reset(struct ingenic_ecc *bch, in jz4780_bch_reset() argument
68 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4780_bch_reset()
73 writel(reg, bch->base + BCH_BHCNT); in jz4780_bch_reset()
80 writel(reg, bch->base + BCH_BHCR); in jz4780_bch_reset()
83 static void jz4780_bch_disable(struct ingenic_ecc *bch) in jz4780_bch_disable() argument
85 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4780_bch_disable()
86 writel(BCH_BHCR_BCHE, bch->base + BCH_BHCCR); in jz4780_bch_disable()
89 static void jz4780_bch_write_data(struct ingenic_ecc *bch, const void *buf, in jz4780_bch_write_data() argument
99 writel(*src32++, bch->base + BCH_BHDR); in jz4780_bch_write_data()
103 writeb(*src8++, bch->base + BCH_BHDR); in jz4780_bch_write_data()
[all …]
H A DKconfig33 will be called jz4725b-bch.
43 will be called jz4780-bch.
/linux/include/linux/
H A Dbch.h61 void bch_free(struct bch_control *bch);
63 void bch_encode(struct bch_control *bch, const uint8_t *data,
66 int bch_decode(struct bch_control *bch, const uint8_t *data, unsigned int len,
/linux/drivers/mtd/nand/
H A Decc-sw-bch.c30 bch_encode(engine_conf->bch, buf, nand->ecc.ctx.conf.step_size, code); in nand_ecc_sw_bch_calculate()
57 count = bch_decode(engine_conf->bch, NULL, step_size, read_ecc, in nand_ecc_sw_bch_correct()
86 bch_free(engine_conf->bch); in nand_ecc_sw_bch_cleanup()
120 engine_conf->bch = bch_init(m, t, 0, false); in nand_ecc_sw_bch_init()
121 if (!engine_conf->bch) in nand_ecc_sw_bch_init()
140 bch_encode(engine_conf->bch, erased_page, eccsize, in nand_ecc_sw_bch_init()
148 if (engine_conf->bch->ecc_bytes != eccbytes) { in nand_ecc_sw_bch_init()
150 eccbytes, engine_conf->bch->ecc_bytes); in nand_ecc_sw_bch_init()
/linux/drivers/spi/
H A Dspi-amlogic-spifc-a4.c76 #define CMD_MEM2NAND(bch, pages) (OP_M2N | ((bch) << 14) | (pages)) argument
77 #define CMD_NAND2MEM(bch, pages) (OP_N2M | ((bch) << 14) | (pages)) argument
171 u32 bch; member
206 #define AML_ECC_DATA(sz, s, b) { .stepsize = (sz), .strength = (s), .bch = (b) }
708 cmd |= CMD_NAND2MEM(ecc_cfg->bch, ecc_cfg->nsteps); in aml_sfc_read_page_hwecc()
773 cmd |= CMD_MEM2NAND(ecc_cfg->bch, ecc_cfg->nsteps); in aml_sfc_write_page_hwecc()
962 nand->ecc.ctx.conf.flags |= BIT(ecc_caps[i].bch); in aml_sfc_ecc_init_ctx()
996 ecc_cfg->bch = nand->ecc.ctx.conf.flags & BIT(ECC_DEFAULT_BCH_MODE) ? 1 : 2; in aml_sfc_ecc_init_ctx()
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm5301x-nand-cs0-bch4.dtsi9 nand-ecc-algo = "bch";
H A Dbcm5301x-nand-cs0-bch1.dtsi11 nand-ecc-algo = "bch";
H A Dbcm5301x-nand-cs0-bch8.dtsi14 nand-ecc-algo = "bch";
/linux/include/linux/mtd/
H A Dnand-ecc-sw-bch.h30 struct bch_control *bch; member
/linux/drivers/mtd/nand/raw/gpmi-nand/
H A Dgpmi-nand.h149 bool bch; member
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8-ss-conn.dtsi31 conn_bch_clk: clock-conn-bch {
368 reg-names = "gpmi-nand", "bch";
372 interrupt-names = "bch";
/linux/drivers/mtd/nand/raw/
H A Dnandsim.c98 static unsigned int bch; variable
130 module_param(bch, uint, 0400);
164 MODULE_PARM_DESC(bch, "Enable BCH ecc and set how many bits should "
2217 chip->ecc.algo = bch ? NAND_ECC_ALGO_BCH : NAND_ECC_ALGO_HAMMING; in ns_attach_chip()
2219 if (!bch) in ns_attach_chip()
2229 eccbytes = ((bch * 13) + 7) / 8; in ns_attach_chip()
2238 NS_ERR("Invalid BCH value %u\n", bch); in ns_attach_chip()
2243 chip->ecc.strength = bch; in ns_attach_chip()
2246 NS_INFO("Using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size); in ns_attach_chip()
H A Darasan-nand-controller.c187 struct bch_control *bch; member
463 bf = bch_decode(anand->bch, raw_buf, chip->ecc.size, in anfc_read_page_hw_ecc()
1186 anand->bch = bch_init(bch_gf_mag, ecc->strength, bch_prim_poly, true); in anfc_init_hw_ecc_controller()
1187 if (!anand->bch) in anfc_init_hw_ecc_controller()
1261 if (anand->bch) in anfc_detach_chip()
1262 bch_free(anand->bch); in anfc_detach_chip()
H A Dmeson_nand.c64 #define CMDRWGEN(cmd_dir, ran, bch, short_mode, page_size, pages) \ argument
68 ((bch) << 14) | \
142 u32 bch; member
209 #define MESON_ECC_DATA(b, s, sz) { .bch = (b), .strength = (s), .size = (sz) }
1300 meson_chip->bch_mode = meson_ecc[i].bch; in meson_nand_bch_mode()
/linux/arch/mips/boot/dts/ingenic/
H A Djz4780.dtsi572 bch: bch@134d0000 { label
573 compatible = "ingenic,jz4780-bch";
H A Djz4725b.dtsi360 bch: ecc-controller@130d0000 { label
361 compatible = "ingenic,jz4725b-bch";
H A Dci20.dts418 ecc-engine = <&bch>;
504 &bch {
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7622-bananapi-bpi-r64.dts108 &bch {
268 &bch {
H A Dmt7622.dtsi551 ecc-engine = <&bch>;
563 nand-ecc-engine = <&bch>;
569 bch: ecc@1100e000 { label
H A Dmt7622-rfb1.dts90 &bch {
H A Dmt2712e.dtsi569 ecc-engine = <&bch>;
575 bch: ecc@1100f000 { label
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623a-rfb-nand.dts107 &bch {
H A Dmt2701.dtsi370 ecc-engine = <&bch>;
375 bch: ecc@1100e000 { label
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28.dtsi104 reg-names = "gpmi-nand", "bch";
106 interrupt-names = "bch";

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