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Searched refs:bar_mask (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/crypto/intel/qat/qat_dh895xccvf/
H A Dadf_drv.c81 unsigned long bar_mask; in adf_probe() local
151 bar_mask = pci_select_bars(pdev, IORESOURCE_MEM); in adf_probe()
152 for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) { in adf_probe()
/linux/drivers/crypto/intel/qat/qat_c62xvf/
H A Dadf_drv.c81 unsigned long bar_mask; in adf_probe() local
151 bar_mask = pci_select_bars(pdev, IORESOURCE_MEM); in adf_probe()
152 for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) { in adf_probe()
/linux/drivers/crypto/intel/qat/qat_c3xxxvf/
H A Dadf_drv.c81 unsigned long bar_mask; in adf_probe() local
151 bar_mask = pci_select_bars(pdev, IORESOURCE_MEM); in adf_probe()
152 for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) { in adf_probe()
/linux/drivers/accel/qaic/
H A Dqaic_drv.c51 int bar_mask; member
60 .bar_mask = BIT(0) | BIT(2) | BIT(4),
67 .bar_mask = BIT(0) | BIT(2) | BIT(4),
74 .bar_mask = BIT(0) | BIT(1) | BIT(2) | BIT(4),
491 if (bars != config->bar_mask) { in init_pci()
493 __func__, config->bar_mask, bars); in init_pci()
/linux/drivers/scsi/isci/
H A Dinit.c268 int err, bar_num, bar_mask = 0; in isci_pci_init() local
280 bar_mask |= 1 << (bar_num * 2); in isci_pci_init()
282 err = pcim_iomap_regions(pdev, bar_mask, DRV_NAME); in isci_pci_init()
/linux/samples/vfio-mdev/
H A Dmdpy.c100 u32 bar_mask; member
133 mdev_state->bar_mask = ~(mdev_state->memsize) + 1; in mdpy_create_config_space()
159 cfg_addr = (cfg_addr & mdev_state->bar_mask); in handle_pci_cfg_write()
H A Dmtty.c165 u32 bar_mask[VFIO_PCI_NUM_REGIONS];
275 mdev_state->bar_mask[0] = ~(MTTY_IO_BAR_SIZE) + 1; in mtty_create_config_space()
280 mdev_state->bar_mask[1] = ~(MTTY_IO_BAR_SIZE) + 1; in mtty_create_config_space()
316 u32 cfg_addr, bar_mask, bar_index = 0; in handle_pci_cfg_write()
348 bar_mask = mdev_state->bar_mask[bar_index]; in handle_pci_cfg_write()
349 cfg_addr = (cfg_addr & bar_mask); in handle_pci_cfg_write()
162 u32 bar_mask[VFIO_PCI_NUM_REGIONS]; global() member
313 u32 cfg_addr, bar_mask, bar_index = 0; handle_pci_cfg_write() local
H A Dmbochs.c172 u64 bar_mask[3]; member
237 mdev_state->bar_mask[0] = ~(mdev_state->memsize) + 1; in mbochs_create_config_space()
242 mdev_state->bar_mask[2] = ~(MBOCHS_MMIO_BAR_SIZE) + 1; in mbochs_create_config_space()
316 cfg_addr = (cfg_addr & mdev_state->bar_mask[index]); in handle_pci_cfg_write()