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Searched refs:bankw (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Devergreen_cs.c178 unsigned bankw; member
270 palign = (8 * surf->bankw * track->npipes) * surf->mtilea; in evergreen_surface_check_2d()
351 switch (surf->bankw) { in evergreen_surface_value_conv_check()
352 case 0: surf->bankw = 1; break; in evergreen_surface_value_conv_check()
353 case 1: surf->bankw = 2; break; in evergreen_surface_value_conv_check()
354 case 2: surf->bankw = 4; break; in evergreen_surface_value_conv_check()
355 case 3: surf->bankw = 8; break; in evergreen_surface_value_conv_check()
358 __func__, __LINE__, prefix, surf->bankw); in evergreen_surface_value_conv_check()
414 surf.bankw = G_028C74_BANK_WIDTH(track->cb_color_attrib[id]); in evergreen_cs_track_validate_cb()
490 surf.bankw, surf.bankh, in evergreen_cs_track_validate_cb()
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H A Dradeon_object.c611 unsigned bankw, bankh, mtaspect, tilesplit, stilesplit; in radeon_bo_set_tiling_flags() local
613 bankw = (tiling_flags >> RADEON_TILING_EG_BANKW_SHIFT) & RADEON_TILING_EG_BANKW_MASK; in radeon_bo_set_tiling_flags()
618 switch (bankw) { in radeon_bo_set_tiling_flags()
H A Datombios_crtc.c1149 unsigned bankw, bankh, mtaspect, tile_split; in dce4_crtc_do_set_base() local
1259 evergreen_tiling_fields(tiling_flags, &bankw, &bankh, &mtaspect, &tile_split); in dce4_crtc_do_set_base()
1325 fb_format |= EVERGREEN_GRPH_BANK_WIDTH(bankw); in dce4_crtc_do_set_base()