Searched refs:aud_clk (Results 1 – 4 of 4) sorted by relevance
136 ret = clk_set_rate(dpsub->aud_clk, in dp_dai_hw_params()144 clk_prepare_enable(dpsub->aud_clk); in dp_dai_hw_params()146 rate = clk_get_rate(dpsub->aud_clk); in dp_dai_hw_params()152 clk_disable_unprepare(dpsub->aud_clk); in dp_dai_hw_params()224 clk_disable_unprepare(dpsub->aud_clk); in dp_dai_hw_free()309 if (!dpsub->aud_clk) in zynqmp_audio_init()443 if (!dpsub->aud_clk) in zynqmp_audio_uninit()
101 dpsub->aud_clk = devm_clk_get(dpsub->dev, "dp_live_audio_aclk"); in zynqmp_dpsub_init_clocks()102 if (!IS_ERR(dpsub->aud_clk)) { in zynqmp_dpsub_init_clocks()107 dpsub->aud_clk = devm_clk_get(dpsub->dev, "dp_aud_clk"); in zynqmp_dpsub_init_clocks()108 if (!IS_ERR(dpsub->aud_clk)) { in zynqmp_dpsub_init_clocks()
71 struct clk *aud_clk; member
1409 rate = clk_get_rate(dp->dpsub->aud_clk); in zynqmp_dp_audio_write_n_m()