Searched refs:aud_1_2_sel_parents (Results 1 – 1 of 1) sorted by relevance
| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt6735-topckgen.c | 312 static const char * const aud_1_2_sel_parents[] = { variable
359 …MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD1_SEL, "aud_1_sel", aud_1_2_sel_parents, CLK_CFG_6, CLK_CFG_6_SET,…
360 …MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD2_SEL, "aud_2_sel", aud_1_2_sel_parents, CLK_CFG_6, CLK_CFG_6_SET,…
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