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Searched refs:asic_id (Results 1 – 25 of 33) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/
H A Dclk_mgr.c150 struct hw_asic_id asic_id = ctx->asic_id; in dc_clk_mgr_create() local
152 switch (asic_id.chip_family) { in dc_clk_mgr_create()
182 if (ASIC_REV_IS_TONGA_P(asic_id.hw_internal_rev) || in dc_clk_mgr_create()
183 ASIC_REV_IS_FIJI_P(asic_id.hw_internal_rev)) { in dc_clk_mgr_create()
187 if (ASIC_REV_IS_POLARIS10_P(asic_id.hw_internal_rev) || in dc_clk_mgr_create()
188 ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev) || in dc_clk_mgr_create()
189 ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)) { in dc_clk_mgr_create()
193 if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev)) { in dc_clk_mgr_create()
206 if (ASICREV_IS_VEGA20_P(asic_id.hw_internal_rev)) in dc_clk_mgr_create()
221 if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev)) { in dc_clk_mgr_create()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/
H A Ddce112_clk_mgr.c104 if (!((clk_mgr_base->ctx->asic_id.chip_family == FAMILY_AI) && in dce112_set_clock()
105 ASICREV_IS_VEGA20_P(clk_mgr_base->ctx->asic_id.hw_internal_rev))) in dce112_set_clock()
177 if (!((clk_mgr->base.ctx->asic_id.chip_family == FAMILY_AI) && in dce112_set_dprefclk()
178 ASICREV_IS_VEGA20_P(clk_mgr->base.ctx->asic_id.hw_internal_rev))) in dce112_set_dprefclk()
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c137 enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id) in resource_parse_asic_id() argument
141 switch (asic_id.chip_family) { in resource_parse_asic_id()
145 if (ASIC_REV_IS_TAHITI_P(asic_id.hw_internal_rev) || in resource_parse_asic_id()
146 ASIC_REV_IS_PITCAIRN_PM(asic_id.hw_internal_rev) || in resource_parse_asic_id()
147 ASIC_REV_IS_CAPEVERDE_M(asic_id.hw_internal_rev)) in resource_parse_asic_id()
149 else if (ASIC_REV_IS_OLAND_M(asic_id.hw_internal_rev)) in resource_parse_asic_id()
159 if (ASIC_REV_IS_KALINDI(asic_id.hw_internal_rev) || in resource_parse_asic_id()
160 ASIC_REV_IS_BHAVANI(asic_id.hw_internal_rev) || in resource_parse_asic_id()
161 ASIC_REV_IS_GODAVARI(asic_id.hw_internal_rev)) in resource_parse_asic_id()
171 if (ASIC_REV_IS_TONGA_P(asic_id.hw_internal_rev) || in resource_parse_asic_id()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/resource/dce110/
H A Ddce110_resource.c570 hws->regs = ASIC_REV_IS_STONEY(ctx->asic_id.hw_internal_rev) ? in dce110_hwseq_create()
1348 struct hw_asic_id *asic_id) in dce110_resource_cap() argument
1350 if (ASIC_REV_IS_STONEY(asic_id->hw_internal_rev)) in dce110_resource_cap()
1360 struct hw_asic_id asic_id) in dce110_resource_construct() argument
1362 (void)asic_id; in dce110_resource_construct()
1369 pool->base.res_cap = dce110_resource_cap(&ctx->asic_id); in dce110_resource_construct()
1533 bw_calcs_init(dc->bw_dceip, dc->bw_vbios, dc->ctx->asic_id); in dce110_resource_construct()
1547 struct hw_asic_id asic_id) in dce110_create_resource_pool() argument
1555 if (dce110_resource_construct(num_virtual_links, dc, pool, asic_id)) in dce110_create_resource_pool()
H A Ddce110_resource.h46 struct hw_asic_id asic_id);
/linux/drivers/gpu/drm/amd/display/dc/resource/dce112/
H A Ddce112_resource.c1223 struct hw_asic_id *asic_id) in dce112_resource_cap() argument
1225 if (ASIC_REV_IS_POLARIS11_M(asic_id->hw_internal_rev) || in dce112_resource_cap()
1226 ASIC_REV_IS_POLARIS12_V(asic_id->hw_internal_rev)) in dce112_resource_cap()
1242 pool->base.res_cap = dce112_resource_cap(&ctx->asic_id); in dce112_resource_construct()
1415 bw_calcs_init(dc->bw_dceip, dc->bw_vbios, dc->ctx->asic_id); in dce112_resource_construct()
/linux/drivers/scsi/qla4xxx/
H A Dql4_nvram.h107 u8 asic_id[4]; /* x00 */ member
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn10/
H A Ddcn10_resource.c888 if ((ctx->asic_id.chip_family == FAMILY_RV) && in dcn10_hwseq_create()
889 ASICREV_IS_RAVEN2(ctx->asic_id.hw_internal_rev)) in dcn10_hwseq_create()
890 switch (ctx->asic_id.pci_revision_id) { in dcn10_hwseq_create()
1520 if (ASICREV_IS_RAVEN2(dc->ctx->asic_id.hw_internal_rev)) in dcn10_resource_construct()
1521 switch (dc->ctx->asic_id.pci_revision_id) { in dcn10_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c1036 if (ASICREV_IS_NAVI14_M(ctx->asic_id.hw_internal_rev)) { in dcn20_stream_encoder_create()
2393 get_asic_rev_soc_bb(dc->ctx->asic_id.hw_internal_rev); in init_soc_bounding_box()
2395 get_asic_rev_ip_params(dc->ctx->asic_id.hw_internal_rev); in init_soc_bounding_box()
2451 get_asic_rev_soc_bb(ctx->asic_id.hw_internal_rev); in dcn20_resource_construct()
2453 get_asic_rev_ip_params(ctx->asic_id.hw_internal_rev); in dcn20_resource_construct()
2455 get_dml_project_version(ctx->asic_id.hw_internal_rev); in dcn20_resource_construct()
2460 if (ASICREV_IS_NAVI14_M(ctx->asic_id.hw_internal_rev)) { in dcn20_resource_construct()
2786 if (ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) { in dcn20_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_compressor.c444 compressor->base.memory_bus_width = ctx->asic_id.vram_width; in dce110_compressor_construct()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/
H A Ddcn31_resource.c2046 if (dc->ctx->asic_id.hw_internal_rev == YELLOW_CARP_B0) { in dcn31_resource_construct()
2235 if (dc->ctx->asic_id.chip_family == FAMILY_YELLOW_CARP && in dcn31_resource_construct()
2236 dc->ctx->asic_id.hw_internal_rev == YELLOW_CARP_B0 && in dcn31_resource_construct()
2242 if (dc->ctx->asic_id.chip_family == AMDGPU_FAMILY_GC_11_0_1) in dcn31_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Ddce_calcs.h472 struct hw_asic_id asic_id);
/linux/drivers/gpu/drm/amd/display/dc/resource/dce120/
H A Ddce120_resource.c1074 bool is_vg20 = ASICREV_IS_VEGA20_P(ctx->asic_id.hw_internal_rev); in dce120_resource_construct()
1269 bw_calcs_init(dc->bw_dceip, dc->bw_vbios, dc->ctx->asic_id); in dce120_resource_construct()
/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dsmu71_discrete.h560 uint32_t asic_id; member
H A Dsmu72_discrete.h627 uint32_t asic_id; member
H A Dsmu74_discrete.h628 uint32_t asic_id; member
H A Dsmu73_discrete.h647 uint32_t asic_id; member
H A Dsmu75_discrete.h656 uint32_t asic_id; member
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_types.h814 struct hw_asic_id asic_id; member
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn301/
H A Ddcn301_resource.c1315 uint32_t hw_internal_rev = dc->ctx->asic_id.hw_internal_rev; in is_soc_bounding_box_valid()
1457 if (dc->ctx->asic_id.chip_id == DEVICE_ID_VGH_1435) in dcn301_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c2596 …if (ASICREV_IS_GC_11_0_3(dc->ctx->asic_id.hw_internal_rev) && (dc->config.sdpif_request_limit_word… in dcn32_resource_construct()
2964 if (ASICREV_IS_GC_11_0_0(dc->ctx->asic_id.hw_internal_rev)) { in dcn32_calc_num_avail_chans_for_mall()
2967 } else if (ASICREV_IS_GC_11_0_2(dc->ctx->asic_id.hw_internal_rev)) { in dcn32_calc_num_avail_chans_for_mall()
/linux/drivers/scsi/lpfc/
H A Dlpfc_sli4.h844 struct lpfc_register asic_id; member
/linux/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_dp_capability.c1432 (uint8_t)(link->ctx->asic_id.chip_id); in dpcd_set_source_specific_data()
1434 (uint8_t)(link->ctx->asic_id.chip_id >> 8); in dpcd_set_source_specific_data()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/
H A Ddcn303_resource.c923 uint32_t hw_internal_rev = dc->ctx->asic_id.hw_internal_rev; in is_soc_bounding_box_valid()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/
H A Ddcn302_resource.c978 uint32_t hw_internal_rev = dc->ctx->asic_id.hw_internal_rev; in is_soc_bounding_box_valid()

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