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Searched refs:apb_base (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/pci/controller/dwc/
H A Dpcie-keembay.c59 void __iomem *apb_base; member
94 val = readl(pcie->apb_base + PCIE_REGS_PCIE_APP_CNTRL); in keembay_pcie_ltssm_set()
99 writel(val, pcie->apb_base + PCIE_REGS_PCIE_APP_CNTRL); in keembay_pcie_ltssm_set()
107 val = readl(pcie->apb_base + PCIE_REGS_PCIE_SII_PM_STATE); in keembay_pcie_link_up()
123 ret = readl_poll_timeout(pcie->apb_base + PCIE_REGS_PCIE_PHY_STAT, in keembay_pcie_start_link()
214 writel(val, pcie->apb_base + PCIE_REGS_LJPLL_CNTRL_2); in keembay_pcie_pll_init()
218 writel(val, pcie->apb_base + PCIE_REGS_LJPLL_CNTRL_3); in keembay_pcie_pll_init()
221 writel(val, pcie->apb_base + PCIE_REGS_LJPLL_CNTRL_0); in keembay_pcie_pll_init()
223 ret = readl_poll_timeout(pcie->apb_base + PCIE_REGS_LJPLL_STA, in keembay_pcie_pll_init()
251 val = readl(pcie->apb_base + PCIE_REGS_INTERRUPT_STATUS); in keembay_pcie_msi_irq_handler()
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H A Dpcie-dw-rockchip.c109 void __iomem *apb_base; member
131 return readl_relaxed(rockchip->apb_base + reg); in rockchip_pcie_readl_apb()
137 writel_relaxed(val, rockchip->apb_base + reg); in rockchip_pcie_writel_apb()
574 rockchip->apb_base = devm_platform_ioremap_resource_byname(pdev, "apb"); in rockchip_pcie_resource_get()
575 if (IS_ERR(rockchip->apb_base)) in rockchip_pcie_resource_get()
576 return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->apb_base), in rockchip_pcie_resource_get()
H A Dpcie-kirin.c453 void __iomem *apb_base; in kirin_pcie_get_resource() local
456 apb_base = devm_platform_ioremap_resource_byname(pdev, "apb"); in kirin_pcie_get_resource()
457 if (IS_ERR(apb_base)) in kirin_pcie_get_resource()
458 return PTR_ERR(apb_base); in kirin_pcie_get_resource()
460 kirin_pcie->apb = devm_regmap_init_mmio(dev, apb_base, in kirin_pcie_get_resource()
/linux/drivers/pci/controller/
H A Dpcie-rockchip-host.c97 addr = rockchip->apb_base + PCIE_RC_CONFIG_NORMAL_BASE + where; in rockchip_pcie_rd_own_conf()
124 addr = rockchip->apb_base + PCIE_RC_CONFIG_NORMAL_BASE + offset; in rockchip_pcie_wr_own_conf()
323 err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1, in rockchip_pcie_host_init_port()
344 err = readl_poll_timeout(rockchip->apb_base + PCIE_CORE_CTRL, in rockchip_pcie_host_init_port()
852 err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_DEBUG_OUT_0, in rockchip_pcie_wait_l2()
H A Dpcie-rockchip-ep.c543 ret = readl_poll_timeout(rockchip->apb_base + PCIE_CORE_CTRL, in rockchip_pcie_ep_link_training()
550 ret = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1, in rockchip_pcie_ep_link_training()
564 readl_poll_timeout(rockchip->apb_base + PCIE_CORE_CTRL, in rockchip_pcie_ep_link_training()