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Searched refs:amdgpu_ring_emit_wreg (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgmc_v12_0.c424 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + in gmc_v12_0_emit_flush_gpu_tlb()
428 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + in gmc_v12_0_emit_flush_gpu_tlb()
444 amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem + in gmc_v12_0_emit_flush_gpu_tlb()
461 amdgpu_ring_emit_wreg(ring, reg, pasid); in gmc_v12_0_emit_pasid_mapping()
H A Dgmc_v11_0.c390 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + in gmc_v11_0_emit_flush_gpu_tlb()
394 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + in gmc_v11_0_emit_flush_gpu_tlb()
410 amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem + in gmc_v11_0_emit_flush_gpu_tlb()
427 amdgpu_ring_emit_wreg(ring, reg, pasid); in gmc_v11_0_emit_pasid_mapping()
H A Dgmc_v10_0.c398 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + in gmc_v10_0_emit_flush_gpu_tlb()
402 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + in gmc_v10_0_emit_flush_gpu_tlb()
418 amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem + in gmc_v10_0_emit_flush_gpu_tlb()
435 amdgpu_ring_emit_wreg(ring, reg, pasid); in gmc_v10_0_emit_pasid_mapping()
H A Dhdp_v4_0.c51 amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET( in hdp_v4_0_invalidate_hdp()
H A Dhdp_v5_2.c48 amdgpu_ring_emit_wreg(ring, in hdp_v5_2_flush_hdp()
H A Dhdp_v5_0.c37 amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET( in hdp_v5_0_invalidate_hdp()
H A Dgmc_v9_0.c1002 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + in gmc_v9_0_emit_flush_gpu_tlb()
1006 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + in gmc_v9_0_emit_flush_gpu_tlb()
1022 amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem + in gmc_v9_0_emit_flush_gpu_tlb()
1043 amdgpu_ring_emit_wreg(ring, reg, pasid); in gmc_v9_0_emit_pasid_mapping()
H A Dgmc_v7_0.c486 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v7_0_emit_flush_gpu_tlb()
489 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v7_0_emit_flush_gpu_tlb()
497 amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid); in gmc_v7_0_emit_pasid_mapping()
H A Dgmc_v8_0.c677 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v8_0_emit_flush_gpu_tlb()
680 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v8_0_emit_flush_gpu_tlb()
688 amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid); in gmc_v8_0_emit_pasid_mapping()
H A Dgmc_v6_0.c370 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v6_0_emit_flush_gpu_tlb()
373 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v6_0_emit_flush_gpu_tlb()
H A Dsdma_v6_0.c1201 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + in sdma_v6_0_ring_emit_vm_flush()
1204 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + in sdma_v6_0_ring_emit_vm_flush()
1248 amdgpu_ring_emit_wreg(ring, reg0, ref); in sdma_v6_0_ring_emit_reg_write_reg_wait()
H A Damdgpu_ring.h440 #define amdgpu_ring_emit_wreg(r, d, v) (r)->funcs->emit_wreg((r), (d), (v)) macro
H A Damdgpu_ring.c452 amdgpu_ring_emit_wreg(ring, reg0, ref); in amdgpu_ring_emit_reg_write_reg_wait_helper()
H A Dgfx_v12_0.c3983 amdgpu_ring_emit_wreg(ring, reg, data); in gfx_v12_0_update_spm_vmid()
H A Dgfx_v11_0.c5598 amdgpu_ring_emit_wreg(ring, reg, data); in gfx_v11_0_update_spm_vmid()