Searched refs:amdgpu_dc_feature_mask (Results 1 – 3 of 3) sorted by relevance
411 !!(amdgpu_dc_feature_mask & DC_PSR_ALLOW_SMU_OPT); in amdgpu_dm_init_power_module()413 !!(amdgpu_dc_feature_mask & DC_PSR_ALLOW_MULTI_DISP_OPT); in amdgpu_dm_init_power_module()425 !(amdgpu_dc_feature_mask & DC_DISABLE_FRACTIONAL_PWM_MASK); in amdgpu_dm_init_power_module()548 if (amdgpu_dc_feature_mask & DC_FBC_MASK) in amdgpu_dm_init()551 if (amdgpu_dc_feature_mask & DC_MULTI_MON_PP_MCLK_SWITCH_MASK) in amdgpu_dm_init()554 if (amdgpu_dc_feature_mask & DC_DISABLE_FRACTIONAL_PWM_MASK) in amdgpu_dm_init()557 if (amdgpu_dc_feature_mask & DC_EDP_NO_POWER_SEQUENCING) in amdgpu_dm_init()560 if (amdgpu_dc_feature_mask & DC_DISABLE_LTTPR_DP1_4A) in amdgpu_dm_init()562 if (amdgpu_dc_feature_mask & DC_DISABLE_LTTPR_DP2_0) in amdgpu_dm_init()565 if (amdgpu_dc_feature_mask & DC_FRL_MASK) in amdgpu_dm_init()[all …]
220 uint amdgpu_dc_feature_mask = 2; variable861 module_param_named(dcfeaturemask, amdgpu_dc_feature_mask, uint, 0444);
202 extern uint amdgpu_dc_feature_mask;