Searched refs:amdgpu_dc_feature_mask (Results 1 – 3 of 3) sorted by relevance
125 (amdgpu_dc_feature_mask & DC_PSR_ALLOW_SMU_OPT) && in amdgpu_dm_link_setup_psr()128 (amdgpu_dc_feature_mask & DC_PSR_ALLOW_MULTI_DISP_OPT); in amdgpu_dm_link_setup_psr()
1969 if (amdgpu_dc_feature_mask & DC_FBC_MASK) in amdgpu_dm_init()1972 if (amdgpu_dc_feature_mask & DC_MULTI_MON_PP_MCLK_SWITCH_MASK) in amdgpu_dm_init()1975 if (amdgpu_dc_feature_mask & DC_DISABLE_FRACTIONAL_PWM_MASK) in amdgpu_dm_init()1978 if (amdgpu_dc_feature_mask & DC_EDP_NO_POWER_SEQUENCING) in amdgpu_dm_init()1981 if (amdgpu_dc_feature_mask & DC_DISABLE_LTTPR_DP1_4A) in amdgpu_dm_init()1983 if (amdgpu_dc_feature_mask & DC_DISABLE_LTTPR_DP2_0) in amdgpu_dm_init()5644 psr_feature_enabled = amdgpu_dc_feature_mask & DC_PSR_MASK; in amdgpu_dm_initialize_drm_device()5663 replay_feature_enabled = amdgpu_dc_feature_mask & DC_REPLAY_MASK; in amdgpu_dm_initialize_drm_device()
220 uint amdgpu_dc_feature_mask = 2; variable860 module_param_named(dcfeaturemask, amdgpu_dc_feature_mask, uint, 0444);