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Searched refs:adc (Results 1 – 25 of 360) sorted by relevance

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/linux/drivers/iio/adc/
H A Dpalmas_gpadc.c131 static struct palmas_adc_event *palmas_gpadc_get_event(struct palmas_gpadc *adc, in palmas_gpadc_get_event() argument
135 if (adc_chan == adc->event0.channel && dir == adc->event0.direction) in palmas_gpadc_get_event()
136 return &adc->event0; in palmas_gpadc_get_event()
138 if (adc_chan == adc->event1.channel && dir == adc->event1.direction) in palmas_gpadc_get_event()
139 return &adc->event1; in palmas_gpadc_get_event()
144 static bool palmas_gpadc_channel_is_freerunning(struct palmas_gpadc *adc, in palmas_gpadc_channel_is_freerunning() argument
147 return palmas_gpadc_get_event(adc, adc_chan, IIO_EV_DIR_RISING) || in palmas_gpadc_channel_is_freerunning()
148 palmas_gpadc_get_event(adc, adc_chan, IIO_EV_DIR_FALLING); in palmas_gpadc_channel_is_freerunning()
175 static int palmas_disable_auto_conversion(struct palmas_gpadc *adc) in palmas_disable_auto_conversion() argument
179 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE, in palmas_disable_auto_conversion()
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H A Dimx93_adc.c104 static void imx93_adc_power_down(struct imx93_adc *adc) in imx93_adc_power_down() argument
109 mcr = readl(adc->regs + IMX93_ADC_MCR); in imx93_adc_power_down()
111 writel(mcr, adc->regs + IMX93_ADC_MCR); in imx93_adc_power_down()
113 ret = readl_poll_timeout(adc->regs + IMX93_ADC_MSR, msr, in imx93_adc_power_down()
118 dev_warn(adc->dev, in imx93_adc_power_down()
123 static void imx93_adc_power_up(struct imx93_adc *adc) in imx93_adc_power_up() argument
128 mcr = readl(adc->regs + IMX93_ADC_MCR); in imx93_adc_power_up()
130 writel(mcr, adc->regs + IMX93_ADC_MCR); in imx93_adc_power_up()
133 static void imx93_adc_config_ad_clk(struct imx93_adc *adc) in imx93_adc_config_ad_clk() argument
138 imx93_adc_power_down(adc); in imx93_adc_config_ad_clk()
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H A Dstm32-adc.c600 static u32 stm32_adc_readl(struct stm32_adc *adc, u32 reg) in stm32_adc_readl() argument
602 return readl_relaxed(adc->common->base + adc->offset + reg); in stm32_adc_readl()
605 #define stm32_adc_readl_addr(addr) stm32_adc_readl(adc, addr)
611 static u16 stm32_adc_readw(struct stm32_adc *adc, u32 reg) in stm32_adc_readw() argument
613 return readw_relaxed(adc->common->base + adc->offset + reg); in stm32_adc_readw()
616 static void stm32_adc_writel(struct stm32_adc *adc, u32 reg, u32 val) in stm32_adc_writel() argument
618 writel_relaxed(val, adc->common->base + adc->offset + reg); in stm32_adc_writel()
621 static void stm32_adc_set_bits(struct stm32_adc *adc, u32 reg, u32 bits) in stm32_adc_set_bits() argument
625 spin_lock_irqsave(&adc->lock, flags); in stm32_adc_set_bits()
626 stm32_adc_writel(adc, reg, stm32_adc_readl(adc, reg) | bits); in stm32_adc_set_bits()
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H A Dimx8qxp-adc.c122 static void imx8qxp_adc_reset(struct imx8qxp_adc *adc) in imx8qxp_adc_reset() argument
127 ctrl = readl(adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
129 writel(ctrl, adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
132 writel(ctrl, adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
136 writel(ctrl, adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
139 static void imx8qxp_adc_reg_config(struct imx8qxp_adc *adc, int channel) in imx8qxp_adc_reg_config() argument
149 writel(adc_cfg, adc->regs + IMX8QXP_ADR_ADC_CFG); in imx8qxp_adc_reg_config()
156 writel(adc_tctrl, adc->regs + IMX8QXP_ADR_ADC_TCTRL(0)); in imx8qxp_adc_reg_config()
164 writel(adc_cmdl, adc->regs + IMX8QXP_ADR_ADC_CMDL(0)); in imx8qxp_adc_reg_config()
172 writel(adc_cmdh, adc->regs + IMX8QXP_ADR_ADC_CMDH(0)); in imx8qxp_adc_reg_config()
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H A Dstm32-dfsdm-adc.c319 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); in stm32_dfsdm_compute_all_osrs() local
320 struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id]; in stm32_dfsdm_compute_all_osrs()
340 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); in stm32_dfsdm_start_channel() local
341 struct regmap *regmap = adc->dfsdm->regmap; in stm32_dfsdm_start_channel()
346 for_each_set_bit(bit, &adc->smask, sizeof(adc->smask) * BITS_PER_BYTE) { in stm32_dfsdm_start_channel()
360 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); in stm32_dfsdm_stop_channel() local
361 struct regmap *regmap = adc->dfsdm->regmap; in stm32_dfsdm_stop_channel()
365 for_each_set_bit(bit, &adc->smask, sizeof(adc->smask) * BITS_PER_BYTE) { in stm32_dfsdm_stop_channel()
395 static int stm32_dfsdm_start_filter(struct stm32_dfsdm_adc *adc, in stm32_dfsdm_start_filter() argument
399 struct stm32_dfsdm *dfsdm = adc->dfsdm; in stm32_dfsdm_start_filter()
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H A Dqcom-spmi-adc5-gen3.c76 int adc5_gen3_read(struct adc5_device_data *adc, unsigned int sdam_index, in adc5_gen3_read() argument
79 return regmap_bulk_read(adc->regmap, in adc5_gen3_read()
80 adc->base[sdam_index].base_addr + offset, in adc5_gen3_read()
85 int adc5_gen3_write(struct adc5_device_data *adc, unsigned int sdam_index, in adc5_gen3_write() argument
88 return regmap_bulk_write(adc->regmap, in adc5_gen3_write()
89 adc->base[sdam_index].base_addr + offset, in adc5_gen3_write()
94 static int adc5_gen3_read_voltage_data(struct adc5_chip *adc, u16 *data) in adc5_gen3_read_voltage_data() argument
99 ret = adc5_gen3_read(&adc->dev_data, ADC5_GEN3_VADC_SDAM, in adc5_gen3_read_voltage_data()
107 dev_err(adc->dev, "Invalid data:%#x\n", *data); in adc5_gen3_read_voltage_data()
111 dev_dbg(adc->dev, "voltage raw code:%#x\n", *data); in adc5_gen3_read_voltage_data()
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H A Drzt2h_adc.c48 static void rzt2h_adc_start(struct rzt2h_adc *adc, unsigned int conversion_type) in rzt2h_adc_start() argument
52 reg = readw(adc->base + RZT2H_ADCSR_REG); in rzt2h_adc_start()
60 writew(reg, adc->base + RZT2H_ADCSR_REG); in rzt2h_adc_start()
63 static void rzt2h_adc_stop(struct rzt2h_adc *adc) in rzt2h_adc_stop() argument
67 reg = readw(adc->base + RZT2H_ADCSR_REG); in rzt2h_adc_stop()
72 writew(reg, adc->base + RZT2H_ADCSR_REG); in rzt2h_adc_stop()
75 static int rzt2h_adc_read_single(struct rzt2h_adc *adc, unsigned int ch, int *val) in rzt2h_adc_read_single() argument
79 ret = pm_runtime_resume_and_get(adc->dev); in rzt2h_adc_read_single()
83 mutex_lock(&adc->lock); in rzt2h_adc_read_single()
85 reinit_completion(&adc->completion); in rzt2h_adc_read_single()
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H A Drzg2l_adc.c115 static unsigned int rzg2l_adc_readl(struct rzg2l_adc *adc, u32 reg) in rzg2l_adc_readl() argument
117 return readl(adc->base + reg); in rzg2l_adc_readl()
120 static void rzg2l_adc_writel(struct rzg2l_adc *adc, unsigned int reg, u32 val) in rzg2l_adc_writel() argument
122 writel(val, adc->base + reg); in rzg2l_adc_writel()
125 static void rzg2l_adc_pwr(struct rzg2l_adc *adc, bool on) in rzg2l_adc_pwr() argument
129 reg = rzg2l_adc_readl(adc, RZG2L_ADM(0)); in rzg2l_adc_pwr()
134 rzg2l_adc_writel(adc, RZG2L_ADM(0), reg); in rzg2l_adc_pwr()
138 static void rzg2l_adc_start_stop(struct rzg2l_adc *adc, bool start) in rzg2l_adc_start_stop() argument
143 reg = rzg2l_adc_readl(adc, RZG2L_ADM(0)); in rzg2l_adc_start_stop()
148 rzg2l_adc_writel(adc, RZG2L_ADM(0), reg); in rzg2l_adc_start_stop()
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H A Dad7944.c185 static int ad7944_3wire_cs_mode_init_msg(struct device *dev, struct ad7944_adc *adc, in ad7944_3wire_cs_mode_init_msg() argument
188 unsigned int t_conv_ns = adc->always_turbo ? adc->timing_spec->turbo_conv_ns in ad7944_3wire_cs_mode_init_msg()
189 : adc->timing_spec->conv_ns; in ad7944_3wire_cs_mode_init_msg()
190 struct spi_transfer *xfers = adc->xfers; in ad7944_3wire_cs_mode_init_msg()
208 xfers[2].rx_buf = &adc->sample.raw; in ad7944_3wire_cs_mode_init_msg()
212 spi_message_init_with_transfers(&adc->msg, xfers, 3); in ad7944_3wire_cs_mode_init_msg()
214 return devm_spi_optimize_message(dev, adc->spi, &adc->msg); in ad7944_3wire_cs_mode_init_msg()
217 static int ad7944_4wire_mode_init_msg(struct device *dev, struct ad7944_adc *adc, in ad7944_4wire_mode_init_msg() argument
220 unsigned int t_conv_ns = adc->always_turbo ? adc->timing_spec->turbo_conv_ns in ad7944_4wire_mode_init_msg()
221 : adc->timing_spec->conv_ns; in ad7944_4wire_mode_init_msg()
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H A Dmcp3911.c109 int (*config)(struct mcp3911 *adc, bool external_vref);
110 int (*get_osr)(struct mcp3911 *adc, u32 *val);
111 int (*set_osr)(struct mcp3911 *adc, u32 val);
112 int (*enable_offset)(struct mcp3911 *adc, bool enable);
113 int (*get_offset)(struct mcp3911 *adc, int channel, int *val);
114 int (*set_offset)(struct mcp3911 *adc, int channel, int val);
115 int (*set_scale)(struct mcp3911 *adc, int channel, u32 val);
116 int (*get_raw)(struct mcp3911 *adc, int channel, int *val);
136 static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len) in mcp3911_read() argument
140 reg = MCP3911_REG_READ(reg, adc->dev_addr); in mcp3911_read()
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H A Dti-adc084s021.c72 static int adc084s021_adc_conversion(struct adc084s021 *adc, __be16 *data) in adc084s021_adc_conversion() argument
74 int n_words = (adc->spi_trans.len >> 1) - 1; /* Discard first word */ in adc084s021_adc_conversion()
78 ret = spi_sync(adc->spi, &adc->message); in adc084s021_adc_conversion()
83 *(data + i) = adc->rx_buf[i + 1]; in adc084s021_adc_conversion()
92 struct adc084s021 *adc = iio_priv(indio_dev); in adc084s021_read_raw() local
101 ret = regulator_enable(adc->reg); in adc084s021_read_raw()
107 adc->tx_buf[0] = channel->channel << 3; in adc084s021_read_raw()
108 ret = adc084s021_adc_conversion(adc, &be_val); in adc084s021_read_raw()
110 regulator_disable(adc->reg); in adc084s021_read_raw()
119 ret = regulator_enable(adc->reg); in adc084s021_read_raw()
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H A Dingenic-adc.c103 int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
117 struct ingenic_adc *adc = iio_priv(iio_dev); in ingenic_adc_set_adcmd() local
119 guard(mutex)(&adc->lock); in ingenic_adc_set_adcmd()
122 readl(adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
129 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
135 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
143 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
149 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
156 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
161 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
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H A Dmcp320x.c119 static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel, in mcp320x_adc_conversion() argument
124 if (adc->chip_info->conv_time) { in mcp320x_adc_conversion()
125 ret = spi_sync(adc->spi, &adc->start_conv_msg); in mcp320x_adc_conversion()
129 usleep_range(adc->chip_info->conv_time, in mcp320x_adc_conversion()
130 adc->chip_info->conv_time + 100); in mcp320x_adc_conversion()
133 memset(&adc->rx_buf, 0, sizeof(adc->rx_buf)); in mcp320x_adc_conversion()
134 if (adc->chip_info->num_channels > 1) in mcp320x_adc_conversion()
135 adc->tx_buf = mcp320x_channel_to_tx_data(device_index, channel, in mcp320x_adc_conversion()
138 ret = spi_sync(adc->spi, &adc->msg); in mcp320x_adc_conversion()
144 *val = (adc->rx_buf[0] << 5 | adc->rx_buf[1] >> 3); in mcp320x_adc_conversion()
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H A Dqcom-spmi-adc5.c157 static int adc5_read(struct adc5_chip *adc, u16 offset, u8 *data, int len) in adc5_read() argument
159 return regmap_bulk_read(adc->regmap, adc->base + offset, data, len); in adc5_read()
162 static int adc5_write(struct adc5_chip *adc, u16 offset, u8 *data, int len) in adc5_write() argument
164 return regmap_bulk_write(adc->regmap, adc->base + offset, data, len); in adc5_write()
167 static int adc5_masked_write(struct adc5_chip *adc, u16 offset, u8 mask, u8 val) in adc5_masked_write() argument
169 return regmap_update_bits(adc->regmap, adc->base + offset, mask, val); in adc5_masked_write()
172 static int adc5_read_voltage_data(struct adc5_chip *adc, u16 *data) in adc5_read_voltage_data() argument
177 ret = adc5_read(adc, ADC5_USR_DATA0, &rslt_lsb, sizeof(rslt_lsb)); in adc5_read_voltage_data()
181 ret = adc5_read(adc, ADC5_USR_DATA1, &rslt_msb, sizeof(rslt_lsb)); in adc5_read_voltage_data()
188 dev_err(adc->dev, "Invalid data:0x%x\n", *data); in adc5_read_voltage_data()
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H A Dti-adc0832.c119 static int adc0831_adc_conversion(struct adc0832 *adc) in adc0831_adc_conversion() argument
121 struct spi_device *spi = adc->spi; in adc0831_adc_conversion()
124 ret = spi_read(spi, &adc->rx_buf, 2); in adc0831_adc_conversion()
131 return (adc->rx_buf[0] << 2 & 0xff) | (adc->rx_buf[1] >> 6); in adc0831_adc_conversion()
134 static int adc0832_adc_conversion(struct adc0832 *adc, int channel, in adc0832_adc_conversion() argument
137 struct spi_device *spi = adc->spi; in adc0832_adc_conversion()
139 .tx_buf = adc->tx_buf, in adc0832_adc_conversion()
140 .rx_buf = adc->rx_buf, in adc0832_adc_conversion()
145 if (!adc->mux_bits) in adc0832_adc_conversion()
146 return adc0831_adc_conversion(adc); in adc0832_adc_conversion()
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H A Dmcp3564.c400 static int mcp3564_read_8bits(struct mcp3564_state *adc, u8 reg, u8 *val) in mcp3564_read_8bits() argument
406 tx_buf = mcp3564_cmd_read(adc->dev_addr, reg); in mcp3564_read_8bits()
408 ret = spi_write_then_read(adc->spi, &tx_buf, sizeof(tx_buf), in mcp3564_read_8bits()
415 static int mcp3564_read_16bits(struct mcp3564_state *adc, u8 reg, u16 *val) in mcp3564_read_16bits() argument
421 tx_buf = mcp3564_cmd_read(adc->dev_addr, reg); in mcp3564_read_16bits()
423 ret = spi_write_then_read(adc->spi, &tx_buf, sizeof(tx_buf), in mcp3564_read_16bits()
430 static int mcp3564_read_32bits(struct mcp3564_state *adc, u8 reg, u32 *val) in mcp3564_read_32bits() argument
436 tx_buf = mcp3564_cmd_read(adc->dev_addr, reg); in mcp3564_read_32bits()
438 ret = spi_write_then_read(adc->spi, &tx_buf, sizeof(tx_buf), in mcp3564_read_32bits()
445 static int mcp3564_write_8bits(struct mcp3564_state *adc, u8 reg, u8 val) in mcp3564_write_8bits() argument
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H A Dmax1241.c41 static int max1241_read(struct max1241 *adc) in max1241_read() argument
57 .rx_buf = &adc->data, in max1241_read()
62 return spi_sync_transfer(adc->spi, xfers, ARRAY_SIZE(xfers)); in max1241_read()
70 struct max1241 *adc = iio_priv(indio_dev); in max1241_read_raw() local
74 mutex_lock(&adc->lock); in max1241_read_raw()
76 if (adc->shutdown) { in max1241_read_raw()
77 gpiod_set_value(adc->shutdown, 0); in max1241_read_raw()
79 ret = max1241_read(adc); in max1241_read_raw()
80 gpiod_set_value(adc->shutdown, 1); in max1241_read_raw()
82 ret = max1241_read(adc); in max1241_read_raw()
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H A Dlpc18xx_adc.c68 static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch) in lpc18xx_adc_read_chan() argument
73 reg = adc->cr_reg | BIT(ch) | LPC18XX_ADC_CR_START_NOW; in lpc18xx_adc_read_chan()
74 writel(reg, adc->base + LPC18XX_ADC_CR); in lpc18xx_adc_read_chan()
76 ret = readl_poll_timeout(adc->base + LPC18XX_ADC_GDR, reg, in lpc18xx_adc_read_chan()
79 dev_warn(adc->dev, "adc read timed out\n"); in lpc18xx_adc_read_chan()
90 struct lpc18xx_adc *adc = iio_priv(indio_dev); in lpc18xx_adc_read_raw() local
94 mutex_lock(&adc->lock); in lpc18xx_adc_read_raw()
95 *val = lpc18xx_adc_read_chan(adc, chan->channel); in lpc18xx_adc_read_raw()
96 mutex_unlock(&adc->lock); in lpc18xx_adc_read_raw()
103 *val = regulator_get_voltage(adc->vref) / 1000; in lpc18xx_adc_read_raw()
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H A Dqcom-pm8xxx-xoadc.c417 struct pm8xxx_xoadc *adc = iio_priv(indio_dev); in pm8xxx_eoc_irq() local
419 complete(&adc->complete); in pm8xxx_eoc_irq()
425 pm8xxx_get_channel(struct pm8xxx_xoadc *adc, u8 chan) in pm8xxx_get_channel() argument
429 for (i = 0; i < adc->nchans; i++) { in pm8xxx_get_channel()
430 struct pm8xxx_chan_info *ch = &adc->chans[i]; in pm8xxx_get_channel()
437 static int pm8xxx_read_channel_rsv(struct pm8xxx_xoadc *adc, in pm8xxx_read_channel_rsv() argument
447 dev_dbg(adc->dev, "read channel \"%s\", amux %d, prescale/mux: %d, rsv %d\n", in pm8xxx_read_channel_rsv()
450 mutex_lock(&adc->lock); in pm8xxx_read_channel_rsv()
455 ret = regmap_write(adc->map, ADC_ARB_USRP_AMUX_CNTRL, val); in pm8xxx_read_channel_rsv()
462 if (adc->variant->broken_ratiometric && !force_ratiometric) { in pm8xxx_read_channel_rsv()
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H A Dti-ads8344.c76 static int ads8344_adc_conversion(struct ads8344 *adc, int channel, in ads8344_adc_conversion() argument
79 struct spi_device *spi = adc->spi; in ads8344_adc_conversion()
82 adc->tx_buf = ADS8344_START; in ads8344_adc_conversion()
84 adc->tx_buf |= ADS8344_SINGLE_END; in ads8344_adc_conversion()
85 adc->tx_buf |= ADS8344_CHANNEL(channel); in ads8344_adc_conversion()
86 adc->tx_buf |= ADS8344_CLOCK_INTERNAL; in ads8344_adc_conversion()
88 ret = spi_write(spi, &adc->tx_buf, 1); in ads8344_adc_conversion()
94 ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf)); in ads8344_adc_conversion()
98 return adc->rx_buf[0] << 9 | adc->rx_buf[1] << 1 | adc->rx_buf[2] >> 7; in ads8344_adc_conversion()
105 struct ads8344 *adc = iio_priv(iio); in ads8344_read_raw() local
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H A Dmcp3422.c88 static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig) in mcp3422_update_config() argument
92 ret = i2c_master_send(adc->i2c, &newconfig, 1); in mcp3422_update_config()
94 adc->config = newconfig; in mcp3422_update_config()
101 static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config) in mcp3422_read() argument
104 u8 sample_rate = FIELD_GET(MCP3422_SRATE_MASK, adc->config); in mcp3422_read()
109 ret = i2c_master_recv(adc->i2c, buf, 4); in mcp3422_read()
113 ret = i2c_master_recv(adc->i2c, buf, 3); in mcp3422_read()
123 static int mcp3422_read_channel(struct mcp3422 *adc, in mcp3422_read_channel() argument
130 mutex_lock(&adc->lock); in mcp3422_read_channel()
132 if (req_channel != FIELD_GET(MCP3422_CHANNEL_MASK, adc->config)) { in mcp3422_read_channel()
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H A Dmax1118.c70 struct max1118 *adc = iio_priv(indio_dev); in max1118_read() local
97 .rx_buf = &adc->data, in max1118_read()
104 ret = spi_sync_transfer(adc->spi, xfers + 1, 2); in max1118_read()
106 ret = spi_sync_transfer(adc->spi, xfers, 3); in max1118_read()
111 return adc->data; in max1118_read()
116 struct max1118 *adc = iio_priv(indio_dev); in max1118_get_vref_mV() local
117 const struct spi_device_id *id = spi_get_device_id(adc->spi); in max1118_get_vref_mV()
126 vref_uV = regulator_get_voltage(adc->reg); in max1118_get_vref_mV()
139 struct max1118 *adc = iio_priv(indio_dev); in max1118_read_raw() local
143 mutex_lock(&adc->lock); in max1118_read_raw()
[all …]
/linux/drivers/hwmon/
H A Dadcxx.c51 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_show() local
57 if (mutex_lock_interruptible(&adc->lock)) in adcxx_show()
60 if (adc->channels == 1) { in adcxx_show()
76 value = value * adc->reference >> 12; in adcxx_show()
79 mutex_unlock(&adc->lock); in adcxx_show()
94 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_max_show() local
97 if (mutex_lock_interruptible(&adc->lock)) in adcxx_max_show()
100 reference = adc->reference; in adcxx_max_show()
102 mutex_unlock(&adc->lock); in adcxx_max_show()
112 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_max_store() local
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-supermicro-x11spi.dts34 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
35 <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
36 <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
37 <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
H A Daspeed-bmc-intel-s2600wf.dts33 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
34 <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
35 <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
36 <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;

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