Home
last modified time | relevance | path

Searched refs:a6xx_gpu (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_gpu.c22 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); in a6xx_gmu_get_timestamp() local
27 count_hi = gmu_read(&a6xx_gpu->gmu, REG_A7XX_GMU_CX_AO_COUNTER_H); in a6xx_gmu_get_timestamp()
28 count_lo = gmu_read(&a6xx_gpu->gmu, REG_A7XX_GMU_CX_AO_COUNTER_L); in a6xx_gmu_get_timestamp()
29 temp = gmu_read(&a6xx_gpu->gmu, REG_A7XX_GMU_CX_AO_COUNTER_H); in a6xx_gmu_get_timestamp()
31 count_hi = gmu_read(&a6xx_gpu->gmu, REG_A6XX_GMU_ALWAYS_ON_COUNTER_H); in a6xx_gmu_get_timestamp()
32 count_lo = gmu_read(&a6xx_gpu->gmu, REG_A6XX_GMU_ALWAYS_ON_COUNTER_L); in a6xx_gmu_get_timestamp()
33 temp = gmu_read(&a6xx_gpu->gmu, REG_A6XX_GMU_ALWAYS_ON_COUNTER_H); in a6xx_gmu_get_timestamp()
58 static int fenced_write(struct a6xx_gpu *a6xx_gpu, u32 offset, u32 value, u32 mask) in fenced_write() argument
60 struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; in fenced_write()
62 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in fenced_write()
[all …]
H A Da8xx_gpu.c22 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); in a8xx_aperture_slice_set() local
27 if (a6xx_gpu->cached_aperture == val) in a8xx_aperture_slice_set()
32 a6xx_gpu->cached_aperture = val; in a8xx_aperture_slice_set()
38 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); in a8xx_aperture_acquire() local
40 spin_lock_irqsave(&a6xx_gpu->aperture_lock, *flags); in a8xx_aperture_acquire()
48 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); in a8xx_aperture_release() local
50 spin_unlock_irqrestore(&a6xx_gpu->aperture_lock, flags); in a8xx_aperture_release()
73 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); in a8xx_read_pipe_slice() local
77 spin_lock_irqsave(&a6xx_gpu->aperture_lock, flags); in a8xx_read_pipe_slice()
80 spin_unlock_irqrestore(&a6xx_gpu->aperture_lock, flags); in a8xx_read_pipe_slice()
[all …]
H A Da6xx_gmu.c24 struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); in a6xx_gmu_fault() local
25 struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; in a6xx_gmu_fault()
97 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); in a6xx_gmu_gx_is_on() local
98 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_gmu_gx_is_on()
123 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); in a7xx_gmu_gx_is_on() local
124 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a7xx_gmu_gx_is_on()
140 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); in a8xx_gmu_gx_is_on() local
141 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a8xx_gmu_gx_is_on()
160 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); in a6xx_gmu_set_freq() local
161 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_gmu_set_freq()
[all …]
H A Da6xx_hfi.c115 struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); in a6xx_hfi_wait_for_msg_interrupt() local
125 if (completion_done(&a6xx_gpu->base.fault_coredump_done)) in a6xx_hfi_wait_for_msg_interrupt()
132 wait_for_completion(&a6xx_gpu->base.fault_coredump_done); in a6xx_hfi_wait_for_msg_interrupt()
331 struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); in a6xx_hfi_send_perf_table() local
332 struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; in a6xx_hfi_send_perf_table()
802 struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); in a6xx_hfi_send_bw_table() local
803 struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; in a6xx_hfi_send_bw_table()
H A Da6xx_gpu_state.c150 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); in a6xx_crashdumper_run() local
157 if (!a6xx_gmu_sptprac_is_on(&a6xx_gpu->gmu)) in a6xx_crashdumper_run()
1219 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); in _a6xx_get_gmu_registers() local
1220 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in _a6xx_get_gmu_registers()
1253 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); in a6xx_get_gmu_registers() local
1283 gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_AO_AHB_FENCE_CTRL, 0); in a6xx_get_gmu_registers()
1316 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); in a6xx_snapshot_gmu_hfi_history() local
1317 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_snapshot_gmu_hfi_history()
1636 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); in a6xx_gpu_state_get() local
1652 a6xx_state->gmu_log = a6xx_snapshot_gmu_bo(a6xx_state, &a6xx_gpu->gmu.log); in a6xx_gpu_state_get()
[all …]
/linux/drivers/gpu/drm/msm/
H A DMakefile23 adreno/a6xx_gpu.o \