Searched refs:a1sys_parents (Results 1 – 3 of 3) sorted by relevance
/linux/drivers/clk/mediatek/ |
H A D | clk-mt7988-topckgen.c | 87 static const char *const a1sys_parents[] = { "top_xtal", "apll2_d4" }; variable 174 MUX_GATE_CLR_SET_UPD(CLK_TOP_A1SYS_SEL, "a1sys_sel", a1sys_parents, 0x070, 0x074, 0x078, 16, 179 MUX_GATE_CLR_SET_UPD(CLK_TOP_A_TUNER_SEL, "a_tuner_sel", a1sys_parents, 0x080, 0x084, 0x088,
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H A D | clk-mt7986-topckgen.c | 149 static const char *const a1sys_parents[] __initconst = { "top_xtal", variable 246 MUX_GATE_CLR_SET_UPD(CLK_TOP_A1SYS_SEL, "a1sys_sel", a1sys_parents,
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H A D | clk-mt7981-topckgen.c | 258 static const char * const a1sys_parents[] __initconst = { variable 371 MUX_GATE_CLR_SET_UPD(CLK_TOP_A1SYS_SEL, "a1sys_sel", a1sys_parents,
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