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Searched refs:_table (Results 1 – 25 of 39) sorted by relevance

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/linux/drivers/clk/sprd/
H A Dmux.h32 #define _SPRD_MUX_CLK(_shift, _width, _table) \ argument
36 .table = _table, \
39 #define SPRD_MUX_CLK_HW_INIT_FN(_struct, _name, _parents, _table, \ argument
42 .mux = _SPRD_MUX_CLK(_shift, _width, _table), \
51 #define SPRD_MUX_CLK_TABLE(_struct, _name, _parents, _table, \ argument
53 SPRD_MUX_CLK_HW_INIT_FN(_struct, _name, _parents, _table, \
62 #define SPRD_MUX_CLK_DATA_TABLE(_struct, _name, _parents, _table, \ argument
64 SPRD_MUX_CLK_HW_INIT_FN(_struct, _name, _parents, _table, \
H A Dcomposite.h21 #define SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \ argument
25 .mux = _SPRD_MUX_CLK(_mshift, _mwidth, _table), \
35 #define SPRD_COMP_CLK_TABLE(_struct, _name, _parent, _reg, _table, \ argument
37 SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \
46 #define SPRD_COMP_CLK_DATA_TABLE(_struct, _name, _parent, _reg, _table, \ argument
49 SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \
61 _table, _mshift, _mwidth, \ argument
64 SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \
/linux/drivers/clk/actions/
H A Dowl-pll.h42 _width, _min_mul, _max_mul, _delay, _table) \ argument
52 .table = _table, \
56 _shift, _width, _min_mul, _max_mul, _table, _flags) \ argument
60 OWL_PLL_DEF_DELAY, _table), \
71 _shift, _width, _min_mul, _max_mul, _table, _flags) \ argument
75 OWL_PLL_DEF_DELAY, _table), \
85 _shift, _width, _min_mul, _max_mul, _delay, _table, \ argument
90 _delay, _table), \
H A Dowl-divider.h29 #define OWL_DIVIDER_HW(_reg, _shift, _width, _div_flags, _table) \ argument
35 .table = _table, \
39 _shift, _width, _table, _div_flags, _flags) \ argument
42 _div_flags, _table), \
H A Dowl-factor.h35 #define OWL_FACTOR_HW(_reg, _shift, _width, _fct_flags, _table) \ argument
41 .table = _table, \
45 _shift, _width, _table, _fct_flags, _flags) \ argument
48 _width, _fct_flags, _table), \
/linux/drivers/clk/sunxi-ng/
H A Dccu_div.h43 #define _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, _flags) \ argument
48 .table = _table, \
51 #define _SUNXI_CCU_DIV_TABLE(_shift, _width, _table) \ argument
52 _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, 0)
89 _table, _gate, _flags) \ argument
92 _table), \
106 _table, _flags) \ argument
108 _shift, _width, _table, 0, \
113 _table, _flags) \ argument
116 _table), \
[all …]
H A Dccu_mux.h32 #define _SUNXI_CCU_MUX_TABLE(_shift, _width, _table) \ argument
36 .table = _table, \
49 #define SUNXI_CCU_MUX_TABLE_WITH_GATE_FEAT(_struct, _name, _parents, _table, \ argument
54 .mux = _SUNXI_CCU_MUX_TABLE(_shift, _width, _table), \
66 _table, _reg, _shift, \ argument
69 _table, _reg, _shift, \
73 #define SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, _table, \ argument
77 _table, _reg, _shift, \
H A Dccu_sdm.h41 #define _SUNXI_CCU_SDM(_table, _enable, \ argument
44 .table = _table, \
45 .table_size = ARRAY_SIZE(_table), \
/linux/drivers/iio/health/
H A Dafe440x.h117 #define AFE440X_TABLE_ATTR(_name, _table) \ argument
124 for (i = 0; i < ARRAY_SIZE(_table); i++) \
126 _table[i].integer, \
127 _table[i].fract); \
145 #define AFE440X_ATTR(_name, _field, _table) \ argument
151 .val_table = _table, \
152 .table_size = ARRAY_SIZE(_table), \
/linux/drivers/clk/spacemit/
H A Dccu_pll.h49 #define CCU_PLL_CONFIG(_table, _reg_lock, _mask_lock) \ argument
51 .rate_tbl = _table, \
52 .tbl_num = ARRAY_SIZE(_table), \
66 #define CCU_PLL_DEFINE(_name, _table, _reg_swcr1, _reg_swcr3, _reg_lock, \ argument
69 .config = CCU_PLL_CONFIG(_table, _reg_lock, _mask_lock), \
/linux/include/linux/
H A Dcrc8.h30 #define CRC8_GOOD_VALUE(_table) (_table[0xFF]) argument
36 #define DECLARE_CRC8_TABLE(_table) \ argument
37 static u8 _table[CRC8_TABLE_SIZE]
H A Dipack.h257 #define DEFINE_IPACK_DEVICE_TABLE(_table) \ argument
258 const struct ipack_device_id _table[]
/linux/drivers/regulator/
H A D88pm8607.c257 .volt_table = vreg##_table, \
258 .n_voltages = ARRAY_SIZE(vreg##_table), \
260 .vsel_mask = ARRAY_SIZE(vreg##_table) - 1, \
280 .volt_table = LDO##_id##_table, \
281 .n_voltages = ARRAY_SIZE(LDO##_id##_table), \
283 .vsel_mask = (ARRAY_SIZE(LDO##_id##_table) - 1) << (shift), \
H A Dbcm590xx-regulator.c90 #define BCM590XX_LDO_DESC(_model, _model_lower, _name, _name_lower, _table) \ argument
93 .n_voltages = ARRAY_SIZE(_model_lower##_##_table), \
94 .volt_table = _model_lower##_##_table, \
115 #define BCM59056_LDO_DESC(_name, _name_lower, _table) \ argument
116 BCM590XX_LDO_DESC(BCM59056, bcm59056, _name, _name_lower, _table)
122 #define BCM59054_LDO_DESC(_name, _name_lower, _table) \ argument
123 BCM590XX_LDO_DESC(BCM59054, bcm59054, _name, _name_lower, _table)
H A Dpcap-regulator.c218 .n_voltages = ARRAY_SIZE(_vreg##_table), \
219 .volt_table = _vreg##_table, \
/linux/arch/powerpc/include/asm/nohash/
H A Dpgalloc.h62 static inline void __tlb_remove_table(void *_table) in __tlb_remove_table() argument
64 void *table = (void *)((unsigned long)_table & ~MAX_PGTABLE_INDEX_SIZE); in __tlb_remove_table()
65 unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE; in __tlb_remove_table()
/linux/arch/powerpc/include/asm/book3s/32/
H A Dpgalloc.h65 static inline void __tlb_remove_table(void *_table) in __tlb_remove_table() argument
67 void *table = (void *)((unsigned long)_table & ~MAX_PGTABLE_INDEX_SIZE); in __tlb_remove_table()
68 unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE; in __tlb_remove_table()
/linux/arch/sparc/include/asm/
H A Dpgalloc_64.h90 static inline void __tlb_remove_table(void *_table) in __tlb_remove_table() argument
92 void *table = (void *)((unsigned long)_table & ~0x1UL); in __tlb_remove_table()
95 if ((unsigned long)_table & 0x1UL) in __tlb_remove_table()
/linux/drivers/clk/nxp/
H A Dclk-lpc18xx-cgu.c169 #define LPC1XX_CGU_SRC_CLK_DIV(_id, _width, _table) \ argument
172 .n_parents = ARRAY_SIZE(lpc18xx_cgu_ ##_table), \
180 .table = lpc18xx_cgu_ ##_table, \
203 #define LPC1XX_CGU_BASE_CLK(_id, _table, _flags) \ argument
206 .n_parents = ARRAY_SIZE(lpc18xx_cgu_ ##_table), \
210 .table = lpc18xx_cgu_ ##_table, \
268 #define LPC1XX_CGU_CLK_PLL(_id, _table, _pll_ops) \ argument
271 .n_parents = ARRAY_SIZE(lpc18xx_cgu_ ##_table), \
276 .table = lpc18xx_cgu_ ##_table, \
/linux/fs/jfs/
H A Djfs_dinode.h79 struct dir_table_slot _table[12]; /* 96: inline */ member
83 #define di_dirtable u._dir._table
H A Djfs_incore.h73 struct dir_table_slot _table[12]; /* 96: dir index */ member
102 #define i_dirtable u.dir._table
/linux/drivers/net/ethernet/sfc/
H A Dmae.c1901 #define TABLE_POPULATE_KEY_IPV4(dst, _table, _field, _value) \ argument
1902 efx_mae_table_populate_ipv4(efx->tc->meta_##_table.desc.keys \
1903 [efx->tc->meta_##_table.keys._field##_idx],\
1904 dst, efx->tc->meta_##_table.desc.key_width,\
1906 #define TABLE_POPULATE_KEY(dst, _table, _field, _value) \ argument
1907 _TABLE_POPULATE(dst, efx->tc->meta_##_table.desc.key_width, \
1908 efx->tc->meta_##_table.desc.keys \
1909 [efx->tc->meta_##_table.keys._field##_idx], \
1912 #define TABLE_POPULATE_RESP_BOOL(dst, _table, _field, _value) \ argument
1913 efx_mae_table_populate_bool(efx->tc->meta_##_table.desc.resps \
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/linux/drivers/clk/meson/
H A Dmeson-clkc-utils.h53 _table, _dflags, _iflags) \ argument
60 .table = (_table), \
/linux/drivers/clk/mvebu/
H A Darmada-37xx-periph.c159 #define PERIPH_DIV(_name, _reg, _shift, _table) \ argument
162 .table = _table, \
186 #define PERIPH_CLK_FULL(_name, _bit, _shift, _reg, _shift1, _table) \ argument
189 static PERIPH_DIV(_name, _reg, _shift1, _table);
191 #define PERIPH_CLK_GATE_DIV(_name, _bit, _reg, _shift, _table) \ argument
193 static PERIPH_DIV(_name, _reg, _shift, _table);
/linux/arch/arm/probes/
H A Ddecode.h315 #define DECODE_TABLE(_mask, _value, _table) \ argument
317 {.table = (_table)}

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