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/linux/include/linux/device-id/
H A Dmdio.h12 #define MDIO_ID_ARGS(_id) \ argument
13 ((_id)>>31) & 1, ((_id)>>30) & 1, ((_id)>>29) & 1, ((_id)>>28) & 1, \
14 ((_id)>>27) & 1, ((_id)>>26) & 1, ((_id)>>25) & 1, ((_id)>>24) & 1, \
15 ((_id)>>23) & 1, ((_id)>>22) & 1, ((_id)>>21) & 1, ((_id)>>20) & 1, \
16 ((_id)>>19) & 1, ((_id)>>18) & 1, ((_id)>>17) & 1, ((_id)>>16) & 1, \
17 ((_id)>>15) & 1, ((_id)>>14) & 1, ((_id)>>13) & 1, ((_id)>>12) & 1, \
18 ((_id)>>11) & 1, ((_id)>>10) & 1, ((_id)>>9) & 1, ((_id)>>8) & 1, \
19 ((_id)>>7) & 1, ((_id)>>6) & 1, ((_id)>>5) & 1, ((_id)>>4) & 1, \
20 ((_id)>>3) & 1, ((_id)>>2) & 1, ((_id)>>1) & 1, (_id) & 1
/linux/drivers/clk/renesas/
H A Drzg2l-cpg.h147 #define DEF_TYPE(_name, _id, _type...) \ argument
148 { .name = _name, .id = _id, .type = _type }
149 #define DEF_BASE(_name, _id, _type, _parent...) \ argument
150 DEF_TYPE(_name, _id, _type, .parent = _parent)
151 #define DEF_SAMPLL(_name, _id, _parent, _conf) \ argument
152 DEF_TYPE(_name, _id, CLK_TYPE_SAM_PLL, .parent = _parent, .conf = _conf)
153 #define DEF_G3L_PLL(_name, _id, _parent, _conf, _default_rate) \ argument
154 DEF_TYPE(_name, _id, CLK_TYPE_G3L_PLL, .parent = _parent, .conf = _conf, \
156 #define DEF_G3S_PLL(_name, _id, _parent, _conf, _default_rate) \ argument
157 DEF_TYPE(_name, _id, CLK_TYPE_G3S_PLL, .parent = _parent, .conf = _conf, \
[all …]
H A Drzv2h-cpg.h213 #define DEF_TYPE(_name, _id, _type...) \ argument
214 { .name = _name, .id = _id, .type = _type }
215 #define DEF_BASE(_name, _id, _type, _parent...) \ argument
216 DEF_TYPE(_name, _id, _type, .parent = _parent)
217 #define DEF_PLL(_name, _id, _parent, _pll_packed) \ argument
218 DEF_TYPE(_name, _id, CLK_TYPE_PLL, .parent = _parent, .cfg.pll = _pll_packed)
219 #define DEF_INPUT(_name, _id) \ argument
220 DEF_TYPE(_name, _id, CLK_TYPE_IN)
221 #define DEF_FIXED(_name, _id, _parent, _mult, _div) \ argument
222 DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
[all …]
/linux/drivers/clk/samsung/
H A Dclk.h58 #define ALIAS(_id, dname, a) \ argument
60 .id = _id, \
83 #define FRATE(_id, cname, pname, f, frate) \ argument
85 .id = _id, \
110 #define FFACTOR(_id, cname, pname, m, d, f) \ argument
112 .id = _id, \
144 #define __MUX(_id, cname, pnames, o, s, w, f, mf) \ argument
146 .id = _id, \
157 #define MUX(_id, cname, pnames, o, s, w) \ argument
158 __MUX(_id, cname, pnames, o, s, w, CLK_SET_RATE_NO_REPARENT, 0)
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/linux/drivers/clk/mediatek/
H A Dclk-mux.h47 #define __GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _paridx, \ argument
51 .id = _id, \
68 #define GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \ argument
71 __GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, \
76 #define GATE_CLR_SET_UPD_FLAGS_INDEXED(_id, _name, _parents, _paridx, \ argument
79 __GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, \
89 #define MUX_GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \ argument
92 GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \
97 #define MUX_GATE_CLR_SET_UPD_FLAGS_INDEXED(_id, _name, _parents, \ argument
100 GATE_CLR_SET_UPD_FLAGS_INDEXED(_id, _name, _parents, \
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H A Dclk-mtk.h39 #define GATE_DUMMY(_id, _name) { \ argument
40 .id = _id, \
53 #define FIXED_CLK(_id, _name, _parent, _rate) { \ argument
54 .id = _id, \
74 #define FACTOR_FLAGS(_id, _name, _parent, _mult, _div, _fl) { \ argument
75 .id = _id, \
83 #define FACTOR(_id, _name, _parent, _mult, _div) \ argument
84 FACTOR_FLAGS(_id, _name, _parent, _mult, _div, CLK_SET_RATE_PARENT)
114 #define MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, _shift, \ argument
116 .id = _id, \
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H A Dclk-mt8188-infra_ao.c45 #define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
46 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao0_cg_regs, _shift, \
49 #define GATE_INFRA_AO0(_id, _name, _parent, _shift) \ argument
50 GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, 0)
52 #define GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
53 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao1_cg_regs, _shift, \
56 #define GATE_INFRA_AO1(_id, _name, _parent, _shift) \ argument
57 GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, 0)
59 #define GATE_INFRA_AO2(_id, _name, _parent, _shift) \ argument
60 GATE_MTK(_id, _name, _parent, &infra_ao2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
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H A Dclk-mt8196-venc.c42 #define GATE_VEN10(_id, _name, _parent, _shift) { \ argument
43 .id = _id, \
52 #define GATE_HWV_VEN10_FLAGS(_id, _name, _parent, _shift, _flags) { \ argument
53 .id = _id, \
64 #define GATE_HWV_VEN10(_id, _name, _parent, _shift) \ argument
65 GATE_HWV_VEN10_FLAGS(_id, _name, _parent, _shift, 0)
67 #define GATE_HWV_VEN11(_id, _name, _parent, _shift) { \ argument
68 .id = _id, \
114 #define GATE_VEN20(_id, _name, _parent, _shift) { \ argument
115 .id = _id, \
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H A Dclk-mt8195-infra_ao.c44 #define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
45 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao0_cg_regs, _shift, \
48 #define GATE_INFRA_AO0(_id, _name, _parent, _shift) \ argument
49 GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, 0)
51 #define GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
52 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao1_cg_regs, _shift, \
55 #define GATE_INFRA_AO1(_id, _name, _parent, _shift) \ argument
56 GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, 0)
58 #define GATE_INFRA_AO2_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
59 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao2_cg_regs, _shift, \
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H A Dclk-mt8196-vdec.c54 #define GATE_HWV_VDE20(_id, _name, _parent, _shift) { \ argument
55 .id = _id, \
65 #define GATE_HWV_VDE21(_id, _name, _parent, _shift) { \ argument
66 .id = _id, \
76 #define GATE_HWV_VDE22(_id, _name, _parent, _shift) { \ argument
77 .id = _id, \
155 #define GATE_HWV_VDE10(_id, _name, _parent, _shift) { \ argument
156 .id = _id, \
166 #define GATE_HWV_VDE11(_id, _name, _parent, _shift) { \ argument
167 .id = _id, \
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H A Dclk-mt8188-vdo1.c51 #define GATE_VDO1_0(_id, _name, _parent, _shift) \ argument
52 GATE_MTK(_id, _name, _parent, &vdo1_0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
54 #define GATE_VDO1_1(_id, _name, _parent, _shift) \ argument
55 GATE_MTK(_id, _name, _parent, &vdo1_1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
57 #define GATE_VDO1_2(_id, _name, _parent, _shift) \ argument
58 GATE_MTK(_id, _name, _parent, &vdo1_2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
60 #define GATE_VDO1_3(_id, _name, _parent, _shift) \ argument
61 GATE_MTK(_id, _name, _parent, &vdo1_3_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
63 #define GATE_VDO1_3_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
64 GATE_MTK_FLAGS(_id, _name, _parent, &vdo1_3_cg_regs, _shift, \
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H A Dclk-mt8186-infra_ao.c38 #define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
39 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao0_cg_regs, _shift, \
42 #define GATE_INFRA_AO0(_id, _name, _parent, _shift) \ argument
43 GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, 0)
45 #define GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
46 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao1_cg_regs, _shift, \
49 #define GATE_INFRA_AO1(_id, _name, _parent, _shift) \ argument
50 GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, 0)
52 #define GATE_INFRA_AO2_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
53 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao2_cg_regs, _shift, \
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H A Dclk-mt8183-ipu_conn.c44 #define GATE_IPU_CONN(_id, _name, _parent, _shift) \ argument
45 GATE_MTK(_id, _name, _parent, &ipu_conn_cg_regs, _shift, \
48 #define GATE_IPU_CONN_APB(_id, _name, _parent, _shift) \ argument
49 GATE_MTK(_id, _name, _parent, &ipu_conn_apb_cg_regs, _shift, \
52 #define GATE_IPU_CONN_AXI_I(_id, _name, _parent, _shift) \ argument
53 GATE_MTK(_id, _name, _parent, &ipu_conn_axi_cg_regs, _shift, \
56 #define GATE_IPU_CONN_AXI1_I(_id, _name, _parent, _shift) \ argument
57 GATE_MTK(_id, _name, _parent, &ipu_conn_axi1_cg_regs, _shift, \
60 #define GATE_IPU_CONN_AXI2_I(_id, _name, _parent, _shift) \ argument
61 GATE_MTK(_id, _name, _parent, &ipu_conn_axi2_cg_regs, _shift, \
H A Dclk-mt8195-vdo1.c43 #define GATE_VDO1_0(_id, _name, _parent, _shift) \ argument
44 GATE_MTK(_id, _name, _parent, &vdo1_0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
46 #define GATE_VDO1_1(_id, _name, _parent, _shift) \ argument
47 GATE_MTK(_id, _name, _parent, &vdo1_1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
49 #define GATE_VDO1_2(_id, _name, _parent, _shift) \ argument
50 GATE_MTK(_id, _name, _parent, &vdo1_2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
52 #define GATE_VDO1_2_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
53 GATE_MTK_FLAGS(_id, _name, _parent, &vdo1_2_cg_regs, _shift, \
56 #define GATE_VDO1_3(_id, _name, _parent, _shift) \ argument
57 GATE_MTK(_id, _name, _parent, &vdo1_3_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
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H A Dclk-mt7988-infracfg.c124 #define GATE_INFRA0_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
125 GATE_MTK_FLAGS(_id, _name, _parent, &infra0_cg_regs, _shift, &mtk_clk_gate_ops_setclr, \
128 #define GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
129 GATE_MTK_FLAGS(_id, _name, _parent, &infra1_cg_regs, _shift, &mtk_clk_gate_ops_setclr, \
132 #define GATE_INFRA2_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
133 GATE_MTK_FLAGS(_id, _name, _parent, &infra2_cg_regs, _shift, &mtk_clk_gate_ops_setclr, \
136 #define GATE_INFRA3_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
137 GATE_MTK_FLAGS(_id, _name, _parent, &infra3_cg_regs, _shift, &mtk_clk_gate_ops_setclr, \
140 #define GATE_INFRA0(_id, _name, _parent, _shift) GATE_INFRA0_FLAGS(_id, _name, _parent, _shift, 0) argument
142 #define GATE_INFRA1(_id, _name, _parent, _shift) GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, 0) argument
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H A Dclk-mt8186-vdec.c39 #define GATE_VDEC0(_id, _name, _parent, _shift) \ argument
40 GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
42 #define GATE_VDEC1(_id, _name, _parent, _shift) \ argument
43 GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
45 #define GATE_VDEC2(_id, _name, _parent, _shift) \ argument
46 GATE_MTK(_id, _name, _parent, &vdec2_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
48 #define GATE_VDEC3(_id, _name, _parent, _shift) \ argument
49 GATE_MTK(_id, _name, _parent, &vdec3_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
/linux/drivers/regulator/
H A Dmax77541-regulator.c54 #define MAX77540_BUCK(_id, _ops) \ argument
55 { .id = MAX77541_BUCK ## _id, \
56 .name = "buck"#_id, \
57 .of_match = "buck"#_id, \
60 .enable_mask = MAX77541_BIT_M ## _id ## _EN, \
65 .vsel_reg = MAX77541_REG_M ## _id ## _VOUT, \
67 .vsel_range_reg = MAX77541_REG_M ## _id ## _CFG1, \
73 #define MAX77541_BUCK(_id, _ops) \ argument
74 { .id = MAX77541_BUCK ## _id, \
75 .name = "buck"#_id, \
[all …]
H A Drtq2134-regulator.c26 #define RTQ2134_REG_FLT_RECORDBUCK(_id) (0x14 + (_id)) argument
27 #define RTQ2134_REG_FLT_BUCKCTRL(_id) (0x37 + (_id)) argument
270 #define RTQ2134_BUCK_DESC(_id) { \ argument
272 .name = "rtq2134_buck" #_id, \
273 .of_match = of_match_ptr("buck" #_id), \
275 .id = RTQ2134_IDX_BUCK##_id, \
282 .vsel_reg = RTQ2134_REG_BUCK##_id##_DVS0CFG1, \
284 .enable_reg = RTQ2134_REG_BUCK##_id##_DVS0CFG0, \
286 .active_discharge_reg = RTQ2134_REG_BUCK##_id##_CFG0, \
289 .ramp_reg = RTQ2134_REG_BUCK##_id##_RSPCFG, \
[all …]
/linux/drivers/clk/pistachio/
H A Dclk.h19 #define GATE(_id, _name, _pname, _reg, _shift) \ argument
21 .id = _id, \
39 #define MUX(_id, _name, _pnames, _reg, _shift) \ argument
41 .id = _id, \
59 #define DIV(_id, _name, _pname, _reg, _width) \ argument
61 .id = _id, \
69 #define DIV_F(_id, _name, _pname, _reg, _width, _div_flags) \ argument
71 .id = _id, \
86 #define FIXED_FACTOR(_id, _name, _pname, _div) \ argument
88 .id = _id, \
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/linux/sound/soc/mediatek/mt8195/
H A Dmt8195-audsys-clk.c28 #define GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, _flags, _cgflags) {\ argument
29 .id = _id, \
38 #define GATE_AFE(_id, _name, _parent, _reg, _bit) \ argument
39 GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, \
42 #define GATE_AUD0(_id, _name, _parent, _bit) \ argument
43 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON0, _bit)
45 #define GATE_AUD1(_id, _name, _parent, _bit) \ argument
46 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON1, _bit)
48 #define GATE_AUD3(_id, _name, _parent, _bit) \ argument
49 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON3, _bit)
[all …]
/linux/sound/soc/mediatek/mt8188/
H A Dmt8188-audsys-clk.c28 #define GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, _flags, _cgflags) {\ argument
29 .id = _id, \
38 #define GATE_AFE(_id, _name, _parent, _reg, _bit) \ argument
39 GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, \
42 #define GATE_AUD0(_id, _name, _parent, _bit) \ argument
43 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON0, _bit)
45 #define GATE_AUD1(_id, _name, _parent, _bit) \ argument
46 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON1, _bit)
48 #define GATE_AUD3(_id, _name, _parent, _bit) \ argument
49 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON3, _bit)
[all …]
/linux/include/rdma/
H A Duverbs_std_types.h13 /* Returns _id, or causes a compile error if _id is not a u32.
19 #define _uobj_check_id(_id) ((_id) * typecheck(u32, _id)) argument
24 #define uobj_get_read(_type, _id, _attrs) \ argument
26 _uobj_check_id(_id), UVERBS_LOOKUP_READ, \
40 #define uobj_get_obj_read(_object, _type, _id, _attrs) \ argument
42 uobj_get_read(_type, _id, _attrs)))
44 #define uobj_get_write(_type, _id, _attr argument
51 uobj_perform_destroy(_type,_id,_attrs) global() argument
58 uobj_get_destroy(_type,_id,_attrs) global() argument
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/linux/drivers/clk/rockchip/
H A Dclk.h684 #define PLL(_type, _id, _name, _pnames, _flags, _con, _mode, _mshift, \ argument
687 .id = _id, \
845 #define COMPOSITE(_id, cname, pnames, f, mo, ms, mw, mf, ds, dw,\ argument
848 .id = _id, \
866 #define COMPOSITE_DIV_OFFSET(_id, cname, pnames, f, mo, ms, mw, \ argument
869 .id = _id, \
888 #define COMPOSITE_NOMUX(_id, cname, pname, f, mo, ds, dw, df, \ argument
891 .id = _id, \
906 #define COMPOSITE_NOMUX_DIVTBL(_id, cname, pname, f, mo, ds, dw,\ argument
909 .id = _id, \
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/linux/sound/soc/mediatek/mt8186/
H A Dmt8186-audsys-clk.c27 #define GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, _flags, _cgflags) {\ argument
28 .id = _id, \
37 #define GATE_AFE(_id, _name, _parent, _reg, _bit) \ argument
38 GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, \
41 #define GATE_AUD0(_id, _name, _parent, _bit) \ argument
42 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON0, _bit)
44 #define GATE_AUD1(_id, _name, _parent, _bit) \ argument
45 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON1, _bit)
47 #define GATE_AUD2(_id, _name, _parent, _bit) \ argument
48 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON2, _bit)
/linux/sound/soc/mediatek/mt8183/
H A Dmt8183-afe-pcm.c429 #define MT8183_MEMIF_BASE(_id, _en_reg, _fs_reg, _mono_reg) \ argument
430 [MT8183_MEMIF_##_id] = { \
431 .name = #_id, \
432 .id = MT8183_MEMIF_##_id, \
433 .reg_ofs_base = AFE_##_id##_BASE, \
434 .reg_ofs_cur = AFE_##_id##_CUR, \
435 .reg_ofs_end = AFE_##_id##_END, \
436 .reg_ofs_base_msb = AFE_##_id##_BASE_MSB, \
437 .reg_ofs_cur_msb = AFE_##_id##_CUR_MSB, \
438 .reg_ofs_end_msb = AFE_##_id##_END_MS
456 MT8183_MEMIF(_id,_fs_reg,_mono_reg) global() argument
495 MT8183_AFE_IRQ_BASE(_id,_fs_reg,_fs_shift,_fs_maskbit) global() argument
510 MT8183_AFE_IRQ(_id) global() argument
515 MT8183_AFE_IRQ_NOFS(_id) global() argument
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