/linux/include/linux/soc/pxa/ |
H A D | cpu.h | 61 unsigned int _id = (id) & 0xf3f0; \ 62 _id == 0x2120; \ 67 unsigned int _id = (id) & 0xf3ff; \ 68 _id <= 0x2105; \ 73 unsigned int _id = (id) & 0xffff; \ 74 _id == 0x2d06; \ 79 unsigned int _id = (id) & 0xf300; \ 80 _id == 0x2100; \ 92 unsigned int _id = (id) >> 4 & 0xfff; \ 93 _id == 0x411; \ [all …]
|
/linux/drivers/clk/renesas/ |
H A D | rzg2l-cpg.h | 141 #define DEF_TYPE(_name, _id, _type...) \ argument 142 { .name = _name, .id = _id, .type = _type } 143 #define DEF_BASE(_name, _id, _type, _parent...) \ argument 144 DEF_TYPE(_name, _id, _type, .parent = _parent) 145 #define DEF_SAMPLL(_name, _id, _parent, _conf) \ argument 146 DEF_TYPE(_name, _id, CLK_TYPE_SAM_PLL, .parent = _parent, .conf = _conf) 147 #define DEF_G3S_PLL(_name, _id, _parent, _conf) \ argument 148 DEF_TYPE(_name, _id, CLK_TYPE_G3S_PLL, .parent = _parent, .conf = _conf) 149 #define DEF_INPUT(_name, _id) \ argument 150 DEF_TYPE(_name, _id, CLK_TYPE_IN) [all …]
|
H A D | rcar-gen3-cpg.h | 37 #define DEF_GEN3_SDH(_name, _id, _parent, _offset) \ argument 38 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SDH, _parent, .offset = _offset) 40 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ argument 41 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset) 43 #define DEF_GEN3_MDSEL(_name, _id, _md, _parent0, _div0, _parent1, _div1) \ argument 44 DEF_BASE(_name, _id, CLK_TYPE_GEN3_MDSEL, \ 48 #define DEF_GEN3_PE(_name, _id, _parent_sscg, _div_sscg, _parent_clean, \ argument 50 DEF_GEN3_MDSEL(_name, _id, 12, _parent_sscg, _div_sscg, \ 53 #define DEF_GEN3_OSC(_name, _id, _parent, _div) \ argument 54 DEF_BASE(_name, _id, CLK_TYPE_GEN3_OSC, _parent, .div = _div) [all …]
|
H A D | rcar-gen4-cpg.h | 35 #define DEF_GEN4_SDH(_name, _id, _parent, _offset) \ argument 36 DEF_BASE(_name, _id, CLK_TYPE_GEN4_SDH, _parent, .offset = _offset) 38 #define DEF_GEN4_SD(_name, _id, _parent, _offset) \ argument 39 DEF_BASE(_name, _id, CLK_TYPE_GEN4_SD, _parent, .offset = _offset) 41 #define DEF_GEN4_MDSEL(_name, _id, _md, _parent0, _div0, _parent1, _div1) \ argument 42 DEF_BASE(_name, _id, CLK_TYPE_GEN4_MDSEL, \ 46 #define DEF_GEN4_OSC(_name, _id, _parent, _div) \ argument 47 DEF_BASE(_name, _id, CLK_TYPE_GEN4_OSC, _parent, .div = _div) 49 #define DEF_GEN4_PLL_F8_25(_name, _idx, _id, _parent) \ argument 50 DEF_BASE(_name, _id, CLK_TYPE_GEN4_PLL_F8_25, _parent, .offset = _idx) [all …]
|
H A D | renesas-cpg-mssr.h | 44 #define DEF_TYPE(_name, _id, _type...) \ argument 45 { .name = _name, .id = _id, .type = _type } 46 #define DEF_BASE(_name, _id, _type, _parent...) \ argument 47 DEF_TYPE(_name, _id, _type, .parent = _parent) 49 #define DEF_INPUT(_name, _id) \ argument 50 DEF_TYPE(_name, _id, CLK_TYPE_IN) 51 #define DEF_FIXED(_name, _id, _parent, _div, _mult) \ argument 52 DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult) 53 #define DEF_DIV6P1(_name, _id, _parent, _offset) \ argument 54 DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset) [all …]
|
/linux/drivers/clk/samsung/ |
H A D | clk.h | 44 #define ALIAS(_id, dname, a) \ argument 46 .id = _id, \ 69 #define FRATE(_id, cname, pname, f, frate) \ argument 71 .id = _id, \ 96 #define FFACTOR(_id, cname, pname, m, d, f) \ argument 98 .id = _id, \ 130 #define __MUX(_id, cname, pnames, o, s, w, f, mf) \ argument 132 .id = _id, \ 143 #define MUX(_id, cname, pnames, o, s, w) \ argument 144 __MUX(_id, cname, pnames, o, s, w, CLK_SET_RATE_NO_REPARENT, 0) [all …]
|
/linux/drivers/clk/mediatek/ |
H A D | clk-mtk.h | 37 #define GATE_DUMMY(_id, _name) { \ argument 38 .id = _id, \ 51 #define FIXED_CLK(_id, _name, _parent, _rate) { \ argument 52 .id = _id, \ 72 #define FACTOR_FLAGS(_id, _name, _parent, _mult, _div, _fl) { \ argument 73 .id = _id, \ 81 #define FACTOR(_id, _name, _parent, _mult, _div) \ argument 82 FACTOR_FLAGS(_id, _name, _parent, _mult, _div, CLK_SET_RATE_PARENT) 112 #define MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, _shift, \ argument 114 .id = _id, \ [all …]
|
H A D | clk-mt8188-infra_ao.c | 45 #define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \ argument 46 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao0_cg_regs, _shift, \ 49 #define GATE_INFRA_AO0(_id, _name, _parent, _shift) \ argument 50 GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, 0) 52 #define GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument 53 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao1_cg_regs, _shift, \ 56 #define GATE_INFRA_AO1(_id, _name, _parent, _shift) \ argument 57 GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, 0) 59 #define GATE_INFRA_AO2(_id, _name, _parent, _shift) \ argument 60 GATE_MTK(_id, _name, _parent, &infra_ao2_cg_regs, _shift, &mtk_clk_gate_ops_setclr) [all …]
|
H A D | clk-mt8195-infra_ao.c | 44 #define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \ argument 45 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao0_cg_regs, _shift, \ 48 #define GATE_INFRA_AO0(_id, _name, _parent, _shift) \ argument 49 GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, 0) 51 #define GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument 52 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao1_cg_regs, _shift, \ 55 #define GATE_INFRA_AO1(_id, _name, _parent, _shift) \ argument 56 GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, 0) 58 #define GATE_INFRA_AO2_FLAGS(_id, _name, _parent, _shift, _flag) \ argument 59 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao2_cg_regs, _shift, \ [all …]
|
H A D | clk-mux.h | 41 #define __GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _paridx, \ argument 45 .id = _id, \ 62 #define GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \ argument 65 __GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, \ 70 #define GATE_CLR_SET_UPD_FLAGS_INDEXED(_id, _name, _parents, _paridx, \ argument 73 __GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, \ 81 #define MUX_GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \ argument 84 GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \ 89 #define MUX_GATE_CLR_SET_UPD_FLAGS_INDEXED(_id, _name, _parents, \ argument 92 GATE_CLR_SET_UPD_FLAGS_INDEXED(_id, _name, _parents, \ [all …]
|
H A D | clk-mt8186-infra_ao.c | 38 #define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \ argument 39 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao0_cg_regs, _shift, \ 42 #define GATE_INFRA_AO0(_id, _name, _parent, _shift) \ argument 43 GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, 0) 45 #define GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument 46 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao1_cg_regs, _shift, \ 49 #define GATE_INFRA_AO1(_id, _name, _parent, _shift) \ argument 50 GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, 0) 52 #define GATE_INFRA_AO2_FLAGS(_id, _name, _parent, _shift, _flag) \ argument 53 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao2_cg_regs, _shift, \ [all …]
|
H A D | clk-mt8183-ipu_conn.c | 44 #define GATE_IPU_CONN(_id, _name, _parent, _shift) \ argument 45 GATE_MTK(_id, _name, _parent, &ipu_conn_cg_regs, _shift, \ 48 #define GATE_IPU_CONN_APB(_id, _name, _parent, _shift) \ argument 49 GATE_MTK(_id, _name, _parent, &ipu_conn_apb_cg_regs, _shift, \ 52 #define GATE_IPU_CONN_AXI_I(_id, _name, _parent, _shift) \ argument 53 GATE_MTK(_id, _name, _parent, &ipu_conn_axi_cg_regs, _shift, \ 56 #define GATE_IPU_CONN_AXI1_I(_id, _name, _parent, _shift) \ argument 57 GATE_MTK(_id, _name, _parent, &ipu_conn_axi1_cg_regs, _shift, \ 60 #define GATE_IPU_CONN_AXI2_I(_id, _name, _parent, _shift) \ argument 61 GATE_MTK(_id, _name, _parent, &ipu_conn_axi2_cg_regs, _shift, \
|
H A D | clk-mt8195-vdo1.c | 43 #define GATE_VDO1_0(_id, _name, _parent, _shift) \ argument 44 GATE_MTK(_id, _name, _parent, &vdo1_0_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 46 #define GATE_VDO1_1(_id, _name, _parent, _shift) \ argument 47 GATE_MTK(_id, _name, _parent, &vdo1_1_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 49 #define GATE_VDO1_2(_id, _name, _parent, _shift) \ argument 50 GATE_MTK(_id, _name, _parent, &vdo1_2_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 52 #define GATE_VDO1_2_FLAGS(_id, _name, _parent, _shift, _flags) \ argument 53 GATE_MTK_FLAGS(_id, _name, _parent, &vdo1_2_cg_regs, _shift, \ 56 #define GATE_VDO1_3(_id, _name, _parent, _shift) \ argument 57 GATE_MTK(_id, _name, _parent, &vdo1_3_cg_regs, _shift, &mtk_clk_gate_ops_setclr) [all …]
|
H A D | clk-mt7988-infracfg.c | 128 #define GATE_INFRA0_FLAGS(_id, _name, _parent, _shift, _flags) \ argument 129 GATE_MTK_FLAGS(_id, _name, _parent, &infra0_cg_regs, _shift, &mtk_clk_gate_ops_setclr, \ 132 #define GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, _flags) \ argument 133 GATE_MTK_FLAGS(_id, _name, _parent, &infra1_cg_regs, _shift, &mtk_clk_gate_ops_setclr, \ 136 #define GATE_INFRA2_FLAGS(_id, _name, _parent, _shift, _flags) \ argument 137 GATE_MTK_FLAGS(_id, _name, _parent, &infra2_cg_regs, _shift, &mtk_clk_gate_ops_setclr, \ 140 #define GATE_INFRA3_FLAGS(_id, _name, _parent, _shift, _flags) \ argument 141 GATE_MTK_FLAGS(_id, _name, _parent, &infra3_cg_regs, _shift, &mtk_clk_gate_ops_setclr, \ 144 #define GATE_INFRA0(_id, _name, _parent, _shift) GATE_INFRA0_FLAGS(_id, _name, _parent, _shift, 0) argument 146 #define GATE_INFRA1(_id, _name, _parent, _shift) GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, 0) argument [all …]
|
H A D | clk-mt8188-vdo1.c | 46 #define GATE_VDO1_0(_id, _name, _parent, _shift) \ argument 47 GATE_MTK(_id, _name, _parent, &vdo1_0_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 49 #define GATE_VDO1_1(_id, _name, _parent, _shift) \ argument 50 GATE_MTK(_id, _name, _parent, &vdo1_1_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 52 #define GATE_VDO1_2(_id, _name, _parent, _shift) \ argument 53 GATE_MTK(_id, _name, _parent, &vdo1_2_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 55 #define GATE_VDO1_3(_id, _name, _parent, _shift) \ argument 56 GATE_MTK(_id, _name, _parent, &vdo1_3_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 58 #define GATE_VDO1_3_FLAGS(_id, _name, _parent, _shift, _flags) \ argument 59 GATE_MTK_FLAGS(_id, _name, _parent, &vdo1_3_cg_regs, _shift, \ [all …]
|
H A D | clk-mt8186-vdec.c | 39 #define GATE_VDEC0(_id, _name, _parent, _shift) \ argument 40 GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv) 42 #define GATE_VDEC1(_id, _name, _parent, _shift) \ argument 43 GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv) 45 #define GATE_VDEC2(_id, _name, _parent, _shift) \ argument 46 GATE_MTK(_id, _name, _parent, &vdec2_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv) 48 #define GATE_VDEC3(_id, _name, _parent, _shift) \ argument 49 GATE_MTK(_id, _name, _parent, &vdec3_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
|
/linux/drivers/regulator/ |
H A D | max77541-regulator.c | 55 #define MAX77540_BUCK(_id, _ops) \ argument 56 { .id = MAX77541_BUCK ## _id, \ 57 .name = "buck"#_id, \ 58 .of_match = "buck"#_id, \ 61 .enable_mask = MAX77541_BIT_M ## _id ## _EN, \ 66 .vsel_reg = MAX77541_REG_M ## _id ## _VOUT, \ 68 .vsel_range_reg = MAX77541_REG_M ## _id ## _CFG1, \ 74 #define MAX77541_BUCK(_id, _ops) \ argument 75 { .id = MAX77541_BUCK ## _id, \ 76 .name = "buck"#_id, \ [all …]
|
H A D | max77826-regulator.c | 118 #define MAX77826_LDO(_id, _type) \ argument 119 [MAX77826_LDO ## _id] = { \ 120 .id = MAX77826_LDO ## _id, \ 121 .name = "LDO"#_id, \ 122 .of_match = of_match_ptr("LDO"#_id), \ 128 .enable_reg = MAX77826_REG_LDO_OPMD1 + (_id - 1) / 4, \ 129 .enable_mask = BIT(((_id - 1) % 4) * 2 + 1), \ 130 .vsel_reg = MAX77826_REG_LDO1_CFG + (_id - 1), \ 135 #define MAX77826_BUCK(_idx, _id, _ops) \ argument 136 [MAX77826_ ## _id] = { \ [all …]
|
H A D | rtq2134-regulator.c | 26 #define RTQ2134_REG_FLT_RECORDBUCK(_id) (0x14 + (_id)) argument 27 #define RTQ2134_REG_FLT_BUCKCTRL(_id) (0x37 + (_id)) argument 270 #define RTQ2134_BUCK_DESC(_id) { \ argument 272 .name = "rtq2134_buck" #_id, \ 273 .of_match = of_match_ptr("buck" #_id), \ 275 .id = RTQ2134_IDX_BUCK##_id, \ 282 .vsel_reg = RTQ2134_REG_BUCK##_id##_DVS0CFG1, \ 284 .enable_reg = RTQ2134_REG_BUCK##_id##_DVS0CFG0, \ 286 .active_discharge_reg = RTQ2134_REG_BUCK##_id##_CFG0, \ 289 .ramp_reg = RTQ2134_REG_BUCK##_id##_RSPCFG, \ [all …]
|
H A D | mpq7920.c | 26 #define MPQ7920BUCK(_name, _id, _ilim) \ argument 27 [MPQ7920_BUCK ## _id] = { \ 28 .id = MPQ7920_BUCK ## _id, \ 39 .csel_reg = MPQ7920_BUCK ##_id## _REG_C, \ 43 MPQ7920_BUCK ## _id), \ 44 .vsel_reg = MPQ7920_BUCK ##_id## _REG_A, \ 47 .active_discharge_reg = MPQ7920_BUCK ##_id## _REG_B, \ 49 .soft_start_reg = MPQ7920_BUCK ##_id## _REG_C, \ 54 #define MPQ7920LDO(_name, _id, _ops, _ilim, _ilim_sz, _creg, _cmask) \ argument 55 [MPQ7920_LDO ## _id] = { \ [all …]
|
H A D | hi6421-regulator.c | 129 #define HI6421_LDO(_id, _match, v_table, vreg, vmask, ereg, emask, \ argument 131 [HI6421_##_id] = { \ 133 .name = #_id, \ 138 .id = HI6421_##_id, \ 168 #define HI6421_LDO_LINEAR(_id, _match, _min_uV, n_volt, vstep, vreg, vmask,\ argument 170 [HI6421_##_id] = { \ 172 .name = #_id, \ 177 .id = HI6421_##_id, \ 208 #define HI6421_LDO_LINEAR_RANGE(_id, _match, n_volt, volt_ranges, vreg, vmask,\ argument 210 [HI6421_##_id] = { \ [all …]
|
/linux/drivers/clk/pistachio/ |
H A D | clk.h | 19 #define GATE(_id, _name, _pname, _reg, _shift) \ argument 21 .id = _id, \ 39 #define MUX(_id, _name, _pnames, _reg, _shift) \ argument 41 .id = _id, \ 59 #define DIV(_id, _name, _pname, _reg, _width) \ argument 61 .id = _id, \ 69 #define DIV_F(_id, _name, _pname, _reg, _width, _div_flags) \ argument 71 .id = _id, \ 86 #define FIXED_FACTOR(_id, _name, _pname, _div) \ argument 88 .id = _id, \ [all …]
|
/linux/sound/soc/mediatek/mt8188/ |
H A D | mt8188-audsys-clk.c | 28 #define GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, _flags, _cgflags) {\ argument 29 .id = _id, \ 38 #define GATE_AFE(_id, _name, _parent, _reg, _bit) \ argument 39 GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, \ 42 #define GATE_AUD0(_id, _name, _parent, _bit) \ argument 43 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON0, _bit) 45 #define GATE_AUD1(_id, _name, _parent, _bit) \ argument 46 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON1, _bit) 48 #define GATE_AUD3(_id, _name, _parent, _bit) \ argument 49 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON3, _bit) [all …]
|
/linux/sound/soc/mediatek/mt8195/ |
H A D | mt8195-audsys-clk.c | 28 #define GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, _flags, _cgflags) {\ argument 29 .id = _id, \ 38 #define GATE_AFE(_id, _name, _parent, _reg, _bit) \ argument 39 GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, \ 42 #define GATE_AUD0(_id, _name, _parent, _bit) \ argument 43 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON0, _bit) 45 #define GATE_AUD1(_id, _name, _parent, _bit) \ argument 46 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON1, _bit) 48 #define GATE_AUD3(_id, _name, _parent, _bit) \ argument 49 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON3, _bit) [all …]
|
/linux/include/rdma/ |
H A D | uverbs_std_types.h | 19 #define _uobj_check_id(_id) ((_id) * typecheck(u32, _id)) argument 24 #define uobj_get_read(_type, _id, _attrs) \ argument 26 _uobj_check_id(_id), UVERBS_LOOKUP_READ, \ 40 #define uobj_get_obj_read(_object, _type, _id, _attrs) \ argument 42 uobj_get_read(_type, _id, _attrs))) 44 #define uobj_get_write(_type, _id, _attrs) \ argument 46 _uobj_check_id(_id), UVERBS_LOOKUP_WRITE, \ 51 #define uobj_perform_destroy(_type, _id, _attrs) \ argument 53 _uobj_check_id(_id), _attrs) 58 #define uobj_get_destroy(_type, _id, _attrs) \ argument [all …]
|