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/linux/drivers/scsi/aic94xx/
H A Daic94xx_dump.c202 #define PRINT_REG_8bit(_ha, _n, _r) asd_printk(STR_8BIT, #_n, _n, \ argument
203 asd_read_reg_byte(_ha, _r))
204 #define PRINT_REG_16bit(_ha, _n, _r) asd_printk(STR_16BIT, #_n, _n, \ argument
205 asd_read_reg_word(_ha, _r))
206 #define PRINT_REG_32bit(_ha, _n, _r) asd_printk(STR_32BIT, #_n, _n, \ argument
207 asd_read_reg_dword(_ha, _r))
209 #define PRINT_CREG_8bit(_ha, _n) asd_printk(STR_8BIT, #_n, _n, \ argument
210 asd_read_reg_byte(_ha, C##_n))
211 #define PRINT_CREG_16bit(_ha, _n) asd_printk(STR_16BIT, #_n, _n, \ argument
212 asd_read_reg_word(_ha, C##_n))
[all …]
H A Daic94xx_dev.c16 #define FIND_FREE_DDB(_ha) find_first_zero_bit((_ha)->hw_prof.ddb_bitmap, \ argument
17 (_ha)->hw_prof.max_ddbs)
18 #define SET_DDB(_ddb, _ha) set_bit(_ddb, (_ha)->hw_prof.ddb_bitmap) argument
19 #define CLEAR_DDB(_ddb, _ha) clear_bit(_ddb, (_ha)->hw_prof.ddb_bitmap) argument
/linux/drivers/scsi/qla2xxx/
H A Dqla_edif.h148 #define EDIF_CAP(_ha) (ql2xsecenable && IS_QLA28XX(_ha)) argument
H A Dqla_def.h4378 #define QLA_ABTS_FW_ENABLED(_ha) ((_ha)->fw_attributes_ext[0] & BIT_14) argument
5179 #define QLA_FW_STARTED(_ha) { \ argument
5181 _ha->flags.fw_started = 1; \
5182 _ha->base_qpair->fw_started = 1; \
5183 for (i = 0; i < _ha->max_qpairs; i++) { \
5184 if (_ha->queue_pair_map[i]) \
5185 _ha->queue_pair_map[i]->fw_started = 1; \
5189 #define QLA_FW_STOPPED(_ha) { \ argument
5191 _ha->flags.fw_started = 0; \
5192 _ha->base_qpair->fw_started = 0; \
[all …]
/linux/include/linux/
H A Dnetdevice.h270 #define netdev_for_each_synced_uc_addr(_ha, _dev) \ argument
271 netdev_for_each_uc_addr((_ha), (_dev)) \
272 if ((_ha)->sync_cnt)
278 #define netdev_for_each_synced_mc_addr(_ha, _dev) \ argument
279 netdev_for_each_mc_addr((_ha), (_dev)) \
280 if ((_ha)->sync_cnt)