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Searched refs:_addr (Results 1 – 25 of 43) sorted by relevance

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/linux/drivers/staging/iio/frequency/
H A Ddds.h14 #define IIO_DEV_ATTR_FREQ(_channel, _num, _mode, _show, _store, _addr) \ argument
16 _mode, _show, _store, _addr)
29 #define IIO_DEV_ATTR_FREQSYMBOL(_channel, _mode, _show, _store, _addr) \ argument
31 _mode, _show, _store, _addr)
37 #define IIO_DEV_ATTR_PHASE(_channel, _num, _mode, _show, _store, _addr) \ argument
39 _mode, _show, _store, _addr)
52 #define IIO_DEV_ATTR_PHASESYMBOL(_channel, _mode, _show, _store, _addr) \ argument
54 _mode, _show, _store, _addr)
60 #define IIO_DEV_ATTR_PINCONTROL_EN(_channel, _mode, _show, _store, _addr)\ argument
62 _mode, _show, _store, _addr)
[all …]
/linux/include/linux/iio/
H A Dsysfs.h54 #define IIO_ATTR(_name, _mode, _show, _store, _addr) \ argument
56 .address = _addr }
58 #define IIO_ATTR_RO(_name, _addr) \ argument
60 .address = _addr }
62 #define IIO_ATTR_WO(_name, _addr) \ argument
64 .address = _addr }
66 #define IIO_ATTR_RW(_name, _addr) \ argument
68 .address = _addr }
70 #define IIO_DEVICE_ATTR(_name, _mode, _show, _store, _addr) \ argument
72 = IIO_ATTR(_name, _mode, _show, _store, _addr)
[all …]
/linux/include/soc/fsl/qe/
H A Dqe.h263 #define qe_setbits_be32(_addr, _v) iowrite32be(ioread32be(_addr) | (_v), (_addr)) argument
264 #define qe_clrbits_be32(_addr, _v) iowrite32be(ioread32be(_addr) & ~(_v), (_addr)) argument
266 #define qe_setbits_be16(_addr, _v) iowrite16be(ioread16be(_addr) | (_v), (_addr)) argument
267 #define qe_clrbits_be16(_addr, _v) iowrite16be(ioread16be(_addr) & ~(_v), (_addr)) argument
269 #define qe_setbits_8(_addr, _v) iowrite8(ioread8(_addr) | (_v), (_addr)) argument
270 #define qe_clrbits_8(_addr, _v) iowrite8(ioread8(_addr) & ~(_v), (_addr)) argument
/linux/arch/x86/kernel/
H A Didt.c21 #define G(_vector, _addr, _ist, _type, _dpl, _segment) \ argument
28 .addr = _addr, \
33 #define INTG(_vector, _addr) \ argument
34 G(_vector, _addr, DEFAULT_STACK, GATE_INTERRUPT, DPL0, __KERNEL_CS)
37 #define SYSG(_vector, _addr) \ argument
38 G(_vector, _addr, DEFAULT_STACK, GATE_INTERRUPT, DPL3, __KERNEL_CS)
45 #define ISTG(_vector, _addr, _ist) \ argument
46 G(_vector, _addr, _ist + 1, GATE_INTERRUPT, DPL0, __KERNEL_CS)
48 #define ISTG(_vector, _addr, _ist) INTG(_vector, _addr) argument
/linux/drivers/gpu/drm/nouveau/include/nvkm/core/
H A Dmemory.h79 u32 _addr = (a), _data = nvkm_ro32((o), _addr); \
80 nvkm_wo32((o), _addr, (_data & ~(m)) | (d)); \
91 u32 _addr = (a), _size = (s) >> 2, *_data = (void *)(p); \
93 *(_data++) = nvkm_ro32((o), _addr); \
94 _addr += 4; \
99 u32 _addr = (a), _size = (s) >> 2, *_data = (void *)(p); \
101 nvkm_wo32((o), _addr, *(_data++)); \
102 _addr += 4; \
H A Ddevice.h122 u32 _addr = (a), _temp = nvkm_rd32(_device, _addr); \
123 nvkm_wr32(_device, _addr, (_temp & ~(m)) | (v)); \
/linux/net/ipv6/netfilter/
H A Dip6t_rt.c40 struct in6_addr _addr; in rt_mt6() local
103 + temp * sizeof(_addr), in rt_mt6()
104 sizeof(_addr), in rt_mt6()
105 &_addr); in rt_mt6()
130 + temp * sizeof(_addr), in rt_mt6()
131 sizeof(_addr), in rt_mt6()
132 &_addr); in rt_mt6()
/linux/arch/m68k/include/asm/
H A Draw_io.h83 (void)({u8 __maybe_unused __w, __v = (b); u32 _addr = ((u32) (addr)); \
84 __w = ((*(__force volatile u8 *) ((_addr | 0x10000) + (__v<<1)))); })
86 (void)({u16 __maybe_unused __w, __v = (w); u32 _addr = ((u32) (addr)); \
87 __w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v & 0xFF)<<1)))); \
88 __w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v >> 8)<<1)))); })
90 (void)({u16 __maybe_unused __w, __v = (w); u32 _addr = ((u32) (addr)); \
91 __w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v >> 8)<<1)))); \
92 __w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v & 0xFF)<<1)))); })
/linux/drivers/ufs/host/
H A Dufs-renesas.c61 #define PARAM_WRITE_800_80C_POLL(_addr, _data_800) \ argument
63 PARAM_WRITE_D0_D4(0x00000800, ((_data_800) << 16) | BIT(8) | (_addr)), \
74 #define PARAM_WRITE_804_80C_POLL(_addr, _data_804) \ argument
76 PARAM_WRITE_D0_D4(0x00000804, ((_data_804) << 16) | BIT(8) | (_addr)), \
121 #define PARAM_INDIRECT_WRITE(_gpio, _addr, _data_800) \ argument
123 PARAM_WRITE_800_80C_POLL(_addr, _data_800), \
127 #define PARAM_INDIRECT_POLL(_gpio, _addr, _expected, _mask) \ argument
129 PARAM_WRITE_800_80C_POLL(_addr, 0), \
/linux/drivers/iio/adc/
H A Dltc2497-core.c108 #define LTC2497_CHAN(_chan, _addr, _ds_name) { \ argument
112 .address = (_addr | (_chan / 2) | ((_chan & 1) ? LTC2497_SIGN : 0)), \
118 #define LTC2497_CHAN_DIFF(_chan, _addr) { \ argument
121 .channel = (_chan) * 2 + ((_addr) & LTC2497_SIGN ? 1 : 0), \
122 .channel2 = (_chan) * 2 + ((_addr) & LTC2497_SIGN ? 0 : 1),\
123 .address = (_addr | _chan), \
H A Dltc2309.c63 #define LTC2309_CHAN(_chan, _addr) { \ argument
66 .address = _addr, \
72 #define LTC2309_DIFF_CHAN(_chan, _chan2, _addr) { \ argument
76 .address = _addr, \
H A Dxilinx-xadc-core.c1056 #define XADC_CHAN_TEMP(_chan, _scan_index, _addr, _bits) { \ argument
1060 .address = (_addr), \
1077 #define XADC_CHAN_VOLTAGE(_chan, _scan_index, _addr, _bits, _ext, _alarm) { \ argument
1081 .address = (_addr), \
1089 .sign = ((_addr) == XADC_REG_VREFN) ? 's' : 'u', \
1099 #define XADC_7S_CHAN_TEMP(_chan, _scan_index, _addr) \ argument
1100 XADC_CHAN_TEMP(_chan, _scan_index, _addr, 12)
1101 #define XADC_7S_CHAN_VOLTAGE(_chan, _scan_index, _addr, _ext, _alarm) \ argument
1102 XADC_CHAN_VOLTAGE(_chan, _scan_index, _addr, 12, _ext, _alarm)
1134 #define XADC_US_CHAN_TEMP(_chan, _scan_index, _addr) \ argument
[all …]
H A Dmt6370-adc.c262 #define MT6370_ADC_CHAN(_idx, _type, _addr, _extra_info) { \ argument
265 .address = _addr, \
H A Dti-ads7924.c122 #define ADS7924_V_CHAN(_chan, _addr) { \ argument
126 .address = _addr, \
/linux/drivers/iio/pressure/
H A Dzpa2326_i2c.c33 #define ZPA2326_SA0(_addr) (_addr & BIT(0)) in zpa2326_i2c_hwid() argument
/linux/arch/riscv/include/asm/
H A Dpage.h208 unsigned long _addr = (unsigned long)vaddr; \
209 (unsigned long)(_addr) >= PAGE_OFFSET && pfn_valid(virt_to_pfn(_addr)); \
/linux/drivers/gpu/drm/nouveau/include/nvif/
H A Dobject.h62 u32 _addr = (b), _data = nvif_rd32(__object, _addr); \
63 nvif_wr32(__object, _addr, (_data & ~(c)) | (d)); \
/linux/drivers/net/ethernet/brocade/bna/
H A Dbna.h29 #define BNA_SET_DMA_ADDR(_addr, _bna_dma_addr) \ argument
32 cpu_to_be64((u64)(_addr)); \
41 #define BNA_GET_DMA_ADDR(_bna_dma_addr, _addr) \ argument
43 (_addr) = ((((u64)ntohl((_bna_dma_addr)->msb))) << 32) \
/linux/drivers/dma/amd/qdma/
H A Dqdma.h39 #define QDMA_INTR_RING_BASE(_addr) ((_addr) >> 12) argument
/linux/drivers/iio/light/
H A Dcm3323.c52 #define CM3323_COLOR_CHANNEL(_color, _addr) { \ argument
58 .address = _addr, \
H A Dtcs3414.c63 #define TCS3414_CHANNEL(_color, _si, _addr) { \ argument
70 .address = _addr, \
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
H A Dvmm.h315 u64 _addr = ((BASE) + MAP->off); \
327 FILL(VMM, PT, PTEI, _ptes, MAP, _addr); \
365 const u64 _addr = (m)->addr + _pteo; \
366 VMM_SPAM((v), " %010llx %016llx%016llx"f, _addr, (hi), (lo), ##a); \
/linux/drivers/iio/chemical/
H A Dpms7003.c172 #define PMS7003_CHAN(_index, _mod, _addr) { \ argument
176 .address = _addr, \
/linux/net/nfc/
H A Drawsock.c76 static int rawsock_connect(struct socket *sock, struct sockaddr *_addr, in rawsock_connect() argument
80 struct sockaddr_nfc *addr = (struct sockaddr_nfc *)_addr; in rawsock_connect()
/linux/drivers/usb/gadget/udc/
H A Dpxa27x_udc.h263 #define PXA_EP_DEF(_idx, _addr, dir, _type, maxpkt, _config, iface, altset) \ argument
268 .dir_in = dir, .addr = _addr, \

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