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Searched refs:__vcpu_assign_sys_reg (Results 1 – 14 of 14) sorted by relevance

/linux/arch/arm64/kvm/hyp/vhe/
H A Dsysreg-sr.c21 __vcpu_assign_sys_reg(vcpu, PAR_EL1, read_sysreg(par_el1)); in __sysreg_save_vel2_state()
22 __vcpu_assign_sys_reg(vcpu, TPIDR_EL1, read_sysreg(tpidr_el1)); in __sysreg_save_vel2_state()
24 __vcpu_assign_sys_reg(vcpu, ESR_EL2, read_sysreg_el1(SYS_ESR)); in __sysreg_save_vel2_state()
25 __vcpu_assign_sys_reg(vcpu, AFSR0_EL2, read_sysreg_el1(SYS_AFSR0)); in __sysreg_save_vel2_state()
26 __vcpu_assign_sys_reg(vcpu, AFSR1_EL2, read_sysreg_el1(SYS_AFSR1)); in __sysreg_save_vel2_state()
27 __vcpu_assign_sys_reg(vcpu, FAR_EL2, read_sysreg_el1(SYS_FAR)); in __sysreg_save_vel2_state()
28 __vcpu_assign_sys_reg(vcpu, MAIR_EL2, read_sysreg_el1(SYS_MAIR)); in __sysreg_save_vel2_state()
29 __vcpu_assign_sys_reg(vcpu, VBAR_EL2, read_sysreg_el1(SYS_VBAR)); in __sysreg_save_vel2_state()
30 __vcpu_assign_sys_reg(vcpu, CONTEXTIDR_EL2, read_sysreg_el1(SYS_CONTEXTIDR)); in __sysreg_save_vel2_state()
31 __vcpu_assign_sys_reg(vcpu, AMAIR_EL2, read_sysreg_el1(SYS_AMAIR)); in __sysreg_save_vel2_state()
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H A Dswitch.c165 __vcpu_assign_sys_reg(vcpu, CNTP_CVAL_EL0, val); in __deactivate_traps()
167 __vcpu_assign_sys_reg(vcpu, CNTHP_CVAL_EL2, val); in __deactivate_traps()
/linux/arch/arm64/kvm/vgic/
H A Dvgic-v3-nested.c292 __vcpu_assign_sys_reg(vcpu, ICH_LRN(i), val); in vgic_v3_sync_nested()
313 __vcpu_assign_sys_reg(vcpu, ICH_VMCR_EL2, read_sysreg_s(SYS_ICH_VMCR_EL2)); in vgic_v3_sync_nested()
372 __vcpu_assign_sys_reg(vcpu, ICH_AP0RN(i), s_cpu_if->vgic_ap0r[i]); in vgic_v3_put_nested()
373 __vcpu_assign_sys_reg(vcpu, ICH_AP1RN(i), s_cpu_if->vgic_ap1r[i]); in vgic_v3_put_nested()
/linux/arch/arm64/kvm/
H A Dpmu-emul.c181 __vcpu_assign_sys_reg(vcpu, reg, val); in kvm_pmu_set_pmc_value()
207 __vcpu_assign_sys_reg(vcpu, counter_index_to_reg(select_idx), val); in kvm_pmu_set_counter_value_user()
242 __vcpu_assign_sys_reg(vcpu, reg, val); in kvm_pmu_stop_counter()
506 __vcpu_assign_sys_reg(vcpu, counter_index_to_reg(i), reg); in kvm_pmu_counter_increment()
605 __vcpu_assign_sys_reg(vcpu, PMCR_EL0, (val & ~(ARMV8_PMU_PMCR_C | ARMV8_PMU_PMCR_P))); in kvm_pmu_handle_pmcr()
782 __vcpu_assign_sys_reg(vcpu, reg, (data & kvm_pmu_evtyper_mask(vcpu->kvm))); in kvm_pmu_set_counter_event_type()
1041 __vcpu_assign_sys_reg(vcpu, MDCR_EL2, val); in kvm_arm_set_nr_counters()
H A Darch_timer.c111 __vcpu_assign_sys_reg(vcpu, CNTV_CTL_EL0, ctl); in timer_set_ctl()
114 __vcpu_assign_sys_reg(vcpu, CNTP_CTL_EL0, ctl); in timer_set_ctl()
117 __vcpu_assign_sys_reg(vcpu, CNTHV_CTL_EL2, ctl); in timer_set_ctl()
120 __vcpu_assign_sys_reg(vcpu, CNTHP_CTL_EL2, ctl); in timer_set_ctl()
133 __vcpu_assign_sys_reg(vcpu, CNTV_CVAL_EL0, cval); in timer_set_cval()
136 __vcpu_assign_sys_reg(vcpu, CNTP_CVAL_EL0, cval); in timer_set_cval()
139 __vcpu_assign_sys_reg(vcpu, CNTHV_CVAL_EL2, cval); in timer_set_cval()
142 __vcpu_assign_sys_reg(vcpu, CNTHP_CVAL_EL2, cval); in timer_set_cval()
H A Dsys_regs.h140 __vcpu_assign_sys_reg(vcpu, r->reg, 0x1de7ec7edbadc0deULL); in reset_unknown()
148 __vcpu_assign_sys_reg(vcpu, r->reg, r->val); in reset_val()
H A Dsys_regs.c391 __vcpu_assign_sys_reg(vcpu, reg, val); in vcpu_write_sys_reg()
747 __vcpu_assign_sys_reg(vcpu, rd->reg, val); in set_oslsr_el1()
983 __vcpu_assign_sys_reg(vcpu, r->reg, pmcr); in reset_pmcr()
1055 __vcpu_assign_sys_reg(vcpu, PMSELR_EL0, p->regval); in access_pmselr()
1224 __vcpu_assign_sys_reg(vcpu, r->reg, val & mask); in set_pmreg()
1333 __vcpu_assign_sys_reg(vcpu, PMUSERENR_EL0, in access_pmuserenr()
1385 __vcpu_assign_sys_reg(vcpu, r->reg, val); in set_pmcr()
1633 __vcpu_assign_sys_reg(vcpu, rd->reg, val); in arch_timer_set_user()
2458 __vcpu_assign_sys_reg(vcpu, r->reg, clidr); in reset_clidr()
2472 __vcpu_assign_sys_reg(vcpu, rd->reg, val); in set_clidr()
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H A Dvgic-sys-reg-v3.c303 __vcpu_assign_sys_reg(vcpu, r->reg, val); in set_gic_ich_reg()
/linux/arch/arm64/kvm/hyp/include/hyp/
H A Dsysreg-sr.h353 __vcpu_assign_sys_reg(vcpu, DACR32_EL2, read_sysreg(dacr32_el2)); in __sysreg32_save_state()
354 __vcpu_assign_sys_reg(vcpu, IFSR32_EL2, read_sysreg(ifsr32_el2)); in __sysreg32_save_state()
357 __vcpu_assign_sys_reg(vcpu, DBGVCR32_EL2, read_sysreg(dbgvcr32_el2)); in __sysreg32_save_state()
H A Dswitch.h48 __vcpu_assign_sys_reg(vcpu, FPEXC32_EL2, read_sysreg(fpexc32_el2)); in __fpsimd_save_fpexc32()
505 __vcpu_assign_sys_reg(vcpu, vcpu_sve_zcr_elx(vcpu), zcr_el1); in fpsimd_lazy_switch_to_host()
/linux/arch/arm64/kvm/hyp/
H A Dexception.c36 __vcpu_assign_sys_reg(vcpu, reg, val); in __vcpu_write_sys_reg()
48 __vcpu_assign_sys_reg(vcpu, SPSR_EL1, val); in __vcpu_write_spsr()
/linux/arch/arm64/kvm/hyp/nvhe/
H A Dhyp-main.c29 __vcpu_assign_sys_reg(vcpu, ZCR_EL1, read_sysreg_el1(SYS_ZCR)); in __hyp_sve_save_guest()
85 __vcpu_assign_sys_reg(vcpu, FPMR, read_sysreg_s(SYS_FPMR)); in fpsimd_sve_sync()
H A Dsys_regs.c256 __vcpu_assign_sys_reg(vcpu, VBAR_EL1, read_sysreg_el1(SYS_VBAR)); in inject_undef64()
/linux/arch/arm64/include/asm/
H A Dkvm_host.h1142 #define __vcpu_assign_sys_reg(v, r, val) \ macro