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Searched refs:__i915 (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dintel_gmbus_regs.h11 #define GMBUS_MMIO_BASE(__i915) ((__i915)->display.gmbus.mmio_base) argument
13 #define GPIO(__i915, gpio) _MMIO(GMBUS_MMIO_BASE(__i915) + 0x5010 + 4 * (gpio)) argument
30 #define GMBUS0(__i915) _MMIO(GMBUS_MMIO_BASE(__i915) + 0x5100) argument
40 #define GMBUS1(__i915) _MMIO(GMBUS_MMIO_BASE(__i915) + 0x5104) argument
57 #define GMBUS2(__i915) _MMIO(GMBUS_MMIO_BASE(__i915) + 0x5108) argument
67 #define GMBUS3(__i915) _MMIO(GMBUS_MMIO_BASE(__i915) + 0x510c) argument
70 #define GMBUS4(__i915) _MMIO(GMBUS_MMIO_BASE(__i915) + 0x5110) argument
78 #define GMBUS5(__i915) _MMIO(GMBUS_MMIO_BASE(__i915) + 0x5120) argument
H A Dintel_display_device.h133 #define HAS_DSC(__i915) (DISPLAY_RUNTIME_INFO(__i915)->has_dsc) argument
134 #define HAS_DSC_MST(__i915) (DISPLAY_VER(__i915) >= 12 && HAS_DSC(__i915)) argument
164 #define IS_DISPLAY_VER_FULL(__i915, from, until) ( \ argument
166 (DISPLAY_VER_FULL(__i915) >= (from) && \
167 DISPLAY_VER_FULL(__i915) <= (until)))
184 #define IS_DISPLAY_VER_STEP(__i915, ipver, from, until) \ argument
185 (IS_DISPLAY_VER_FULL((__i915), (ipver), (ipver)) && \
186 IS_DISPLAY_STEP((__i915), (from), (until)))
197 #define INTEL_DISPLAY_STEP(__i915) (DISPLAY_RUNTIME_INFO(__i915)->step) argument
199 #define IS_DISPLAY_STEP(__i915, since, until) \ argument
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H A Dintel_dpll_mgr.h33 #define for_each_shared_dpll(__i915, __pll, __i) \ argument
34 for ((__i) = 0; (__i) < (__i915)->display.dpll.num_shared_dpll && \
35 ((__pll) = &(__i915)->display.dpll.shared_dplls[(__i)]) ; (__i)++)
H A Dintel_hdcp_regs.h11 #define TRANS_HDCP(__i915) (DISPLAY_VER(__i915) >= 12) argument
H A Dintel_display.h579 #define I915_STATE_WARN(__i915, condition, format...) ({ \ argument
580 struct drm_device *drm = &(__i915)->drm; \
583 if (!drm_WARN(drm, __i915->display.params.verbose_state_checks, format)) \
/linux/drivers/gpu/drm/i915/
H A Di915_drv.h415 #define INTEL_GRAPHICS_STEP(__i915) (RUNTIME_INFO(__i915)->step.graphics_step) argument
416 #define INTEL_MEDIA_STEP(__i915) (RUNTIME_INFO(__i915)->step.media_step) argument
418 #define IS_GRAPHICS_STEP(__i915, since, until) \ argument
419 (drm_WARN_ON(&(__i915)->drm, INTEL_GRAPHICS_STEP(__i915) == STEP_NONE), \
420 INTEL_GRAPHICS_STEP(__i915) >= (since) && INTEL_GRAPHICS_STEP(__i915) < (until))
422 #define IS_MEDIA_STEP(__i915, since, until) \ argument
423 (drm_WARN_ON(&(__i915)->drm, INTEL_MEDIA_STEP(__i915) == STEP_NONE), \
424 INTEL_MEDIA_STEP(__i915) >= (since) && INTEL_MEDIA_STEP(__i915) < (until))
H A Di915_reg.h843 #define DSPCLK_GATE_D(__i915) _MMIO(DISPLAY_MMIO_BASE(__i915) + 0x6200) argument
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_engine.h184 #define INTEL_HWS_CSB_WRITE_INDEX(__i915) \ argument
185 (GRAPHICS_VER(__i915) >= 11 ? ICL_HWS_CSB_WRITE_INDEX : I915_HWS_CSB_WRITE_INDEX)