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Searched refs:__EVENT_CONSTRAINT (Results 1 – 4 of 4) sorted by relevance

/linux/arch/x86/events/
H A Dperf_event.h407 #define __EVENT_CONSTRAINT(c, n, m, w, o, f) \ macro
411 __EVENT_CONSTRAINT(c, n, m, HWEIGHT(n), 0, 0)
421 __EVENT_CONSTRAINT(c, n, ARCH_PERFMON_EVENTSEL_EVENT, HWEIGHT(n),\
446 __EVENT_CONSTRAINT(c, n, m, HWEIGHT(n), 1, 0)
505 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK, \
509 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
513 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
517 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
521 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
525 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
[all …]
/linux/arch/x86/events/amd/
H A Dcore.c1276 __EVENT_CONSTRAINT(0, 0x1, AMD64_RAW_EVENT_MASK, 1, 0, PERF_X86_EVENT_PAIR);
1480 __EVENT_CONSTRAINT(0, even_ctr_mask, 0, in amd_core_pmu_init()
/linux/arch/x86/events/intel/
H A Duncore.c1031 __EVENT_CONSTRAINT(0, (1ULL << type->num_counters) - 1, in uncore_type_init()
H A Dcore.c6292 __EVENT_CONSTRAINT(0, pmu->cntr_mask64, in intel_pmu_check_hybrid_pmus()
7741 __EVENT_CONSTRAINT(0, pmu->cntr_mask64, in intel_pmu_init_hybrid()
8625 __EVENT_CONSTRAINT(0, pmu->cntr_mask64, in intel_pmu_init()