Searched refs:XGMAC_RX_CONFIG (Results 1 – 3 of 3) sorted by relevance
24 rx = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_core_init()27 writel(rx | XGMAC_CORE_INIT_RX, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_core_init()54 u32 rx = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_mac()65 writel(rx, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_mac()73 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_rx_ipc()78 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_rx_ipc()80 return !!(readl(ioaddr + XGMAC_RX_CONFIG) & XGMAC_CONFIG_IPC); in dwxgmac2_rx_ipc()387 u32 cfg = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_pmt()389 writel(cfg, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_pmt()557 u32 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_mac_loopback()[all …]
296 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_dma_start_rx()298 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_dma_start_rx()558 u32 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_enable_sph()562 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_enable_sph()
30 #define XGMAC_RX_CONFIG 0x00000004 macro