| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | display_mode_vba_31.h | 36 unsigned int WritebackHTaps,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | display_mode_vba_314.h | 37 unsigned int WritebackHTaps,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_mode_vba_30.h | 36 unsigned int WritebackHTaps,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_mode_vba_util_32.h | 840 unsigned int WritebackHTaps,
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| H A D | display_mode_vba_32.c | 94 mode_lib->vba.WritebackHTaps[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1891 || mode_lib->vba.WritebackHTaps[k] > mode_lib->vba.WritebackMaxHSCLTaps in dml32_ModeSupportAndSystemConfigurationFull()
1893 || mode_lib->vba.WritebackHRatio[k] > mode_lib->vba.WritebackHTaps[k] in dml32_ModeSupportAndSystemConfigurationFull()
1895 || (mode_lib->vba.WritebackHTaps[k] > 2.0 in dml32_ModeSupportAndSystemConfigurationFull()
1896 && ((mode_lib->vba.WritebackHTaps[k] % 2) == 1))) { in dml32_ModeSupportAndSystemConfigurationFull()
2242 mode_lib->vba.WritebackHTaps[k], in dml32_ModeSupportAndSystemConfigurationFull()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_vba.h | 1070 unsigned int WritebackHTaps[DC__NUM_DPP__MAX]; member
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| H A D | display_mode_vba.c | 675 mode_lib->vba.WritebackHTaps[mode_lib->vba.NumberOfActivePlanes] = in fetch_pipe_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | display_mode_core.c | 64 dml_uint_t WritebackHTaps,
1809 dml_uint_t WritebackHTaps, in CalculateWriteBackDISPCLK()
1821 DISPCLK_H = PixelClock * dml_ceil(WritebackHTaps / 8.0, 1) / WritebackHRatio; in CalculateWriteBackDISPCLK()
7054 || mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k] > (dml_uint_t) mode_lib->ms.ip.writeback_max_hscl_taps in dml_core_mode_support()
7056 || mode_lib->ms.cache_display_cfg.writeback.WritebackHRatio[k] > (dml_uint_t) mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k] in dml_core_mode_support()
7058 || (mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k] > 2.0 && ((mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k] % 2) == 1))) { in dml_core_mode_support()
7389 mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k], in dml_core_mode_support()
8467 mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k], in dml_core_mode_programming()
1807 CalculateWriteBackDISPCLK(enum dml_source_format_class WritebackPixelFormat,dml_float_t PixelClock,dml_float_t WritebackHRatio,dml_float_t WritebackVRatio,dml_uint_t WritebackHTaps,dml_uint_t WritebackVTaps,dml_uint_t WritebackSourceWidth,dml_uint_t WritebackDestinationWidth,dml_uint_t HTotal,dml_uint_t WritebackLineBufferSize,dml_float_t DISPCLKDPPCLKVCOSpeed) CalculateWriteBackDISPCLK() argument
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| H A D | display_mode_core_structs.h | 646 dml_uint_t WritebackHTaps[__DML_NUM_PLANES__]; member
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| H A D | dml2_translation_helper.c | 1260 out->WritebackHTaps[location] = wb_info->dwb_params.scaler_taps.h_taps > 0 ? in populate_dml_writeback_cfg_from_stream_state()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4_calcs.c | 4496 unsigned int WritebackHTaps, in RequiredDTBCLK()
4507 DISPCLK_H = PixelClock * math_ceil2((double)WritebackHTaps / 8.0, 1) / WritebackHRatio; in RequiredDTBCLK()
4469 CalculateWriteBackDISPCLK(enum dml2_source_format_class WritebackPixelFormat,double PixelClock,double WritebackHRatio,double WritebackVRatio,unsigned int WritebackHTaps,unsigned int WritebackVTaps,unsigned int WritebackSourceWidth,unsigned int WritebackDestinationWidth,unsigned int HTotal,unsigned int WritebackLineBufferSize) CalculateWriteBackDISPCLK() argument
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