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Searched refs:WritebackDestinationWidth (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_mode_vba_31.h39 long WritebackDestinationWidth,
H A Ddisplay_mode_vba_31.c267 int WritebackDestinationWidth,
2033 v->WritebackDestinationWidth[k],
2509 v->WritebackDestinationWidth[k],
2525 v->WritebackDestinationWidth[j],
3188 WRBandwidth = v->WritebackDestinationWidth[k] * v->WritebackDestinationHeight[k]
3191 WRBandwidth = v->WritebackDestinationWidth[k] * v->WritebackDestinationHeight[k]
3363 long WritebackDestinationWidth, argument
3370 …DISPCLK_V = PixelClock * (WritebackVTaps * dml_ceil(WritebackDestinationWidth / 6.0, 1) + 8.0) / H…
3371 …DISPCLK_HB = PixelClock * WritebackVTaps * (WritebackDestinationWidth * WritebackVTaps - Writeback…
3380 int WritebackDestinationWidth, argument
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_mode_vba_314.h40 long WritebackDestinationWidth,
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_mode_vba_30.h39 long WritebackDestinationWidth,
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.c665 mode_lib->vba.WritebackDestinationWidth[mode_lib->vba.NumberOfActivePlanes] = in fetch_pipe_params()
1126 double WritebackDestinationWidth, in CalculateWriteBackDISPCLK() argument
1132 …tebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio, 1) * dml_ceil(WritebackDestinationWidth / 4.0, 1) in CalculateWriteBackDISPCLK()
1133 …+ dml_ceil(WritebackDestinationWidth / 4.0, 1)) / (double) HTotal + dml_ceil(1.0 / WritebackVRatio… in CalculateWriteBackDISPCLK()
1135 dml_ceil(1.0 / WritebackVRatio, 1) * WritebackDestinationWidth / (double) HTotal)); in CalculateWriteBackDISPCLK()
1139 …ChromaVTaps * dml_ceil(1 / (2 * WritebackVRatio), 1) * dml_ceil(WritebackDestinationWidth / 2.0 / … in CalculateWriteBackDISPCLK()
1140 + dml_ceil(WritebackDestinationWidth / 2.0 / WritebackChromaLineBufferWidth, 1)) / HTotal in CalculateWriteBackDISPCLK()
1142 dml_ceil(1.0 / (2 * WritebackVRatio), 1) * WritebackDestinationWidth / 2.0 / HTotal))); in CalculateWriteBackDISPCLK()
H A Ddisplay_mode_vba.h486 double WritebackDestinationWidth[DC__NUM_DPP__MAX]; member
1257 double WritebackDestinationWidth,
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.h584 unsigned int WritebackDestinationWidth,
843 unsigned int WritebackDestinationWidth,
H A Ddisplay_mode_vba_32.c95 mode_lib->vba.WritebackDestinationWidth[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
608 mode_lib->vba.WritebackDestinationWidth[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
625 mode_lib->vba.WritebackDestinationWidth[j], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1484 WRBandwidth = mode_lib->vba.WritebackDestinationWidth[k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1489 WRBandwidth = mode_lib->vba.WritebackDestinationWidth[k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1841 v->WriteBandwidth[k] = mode_lib->vba.WritebackDestinationWidth[k] in dml32_ModeSupportAndSystemConfigurationFull()
1846 v->WriteBandwidth[k] = mode_lib->vba.WritebackDestinationWidth[k] in dml32_ModeSupportAndSystemConfigurationFull()
1894 if (2.0 * mode_lib->vba.WritebackDestinationWidth[k] * (mode_lib->vba.WritebackVTaps[k] - 1) in dml32_ModeSupportAndSystemConfigurationFull()
2240 mode_lib->vba.WritebackDestinationWidth[k], in dml32_ModeSupportAndSystemConfigurationFull()
2924 mode_lib->vba.WritebackDestinationWidth[k], in dml32_ModeSupportAndSystemConfigurationFull()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddisplay_mode_core_structs.h586 dml_uint_t WritebackDestinationWidth[__DML_NUM_PLANES__]; member
1316 dml_uint_t *WritebackDestinationWidth; member
H A Ddml2_translation_helper.c1211 out->WritebackDestinationWidth[location] = wb_info->dwb_params.dest_width; in populate_dml_writeback_cfg_from_stream_state()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_shared.c360 unsigned int WritebackDestinationWidth,
424 unsigned int WritebackDestinationWidth,
6266 unsigned int WritebackDestinationWidth, in CalculateWriteBackDelay() argument
6277 …Line_length = math_max2((double)WritebackDestinationWidth, math_ceil2((double)WritebackDestination… in CalculateWriteBackDelay()
6282 …BackDelay = Output_lines_last_notclamped * Line_length + (HTotal - WritebackDestinationWidth) + 80; in CalculateWriteBackDelay()
6907 unsigned int WritebackDestinationWidth, in CalculateWriteBackDISPCLK() argument
6914 …DISPCLK_V = PixelClock * (WritebackVTaps * math_ceil2((double)WritebackDestinationWidth / 6.0, 1) … in CalculateWriteBackDISPCLK()
6915 …DISPCLK_HB = PixelClock * WritebackVTaps * (WritebackDestinationWidth * WritebackVTaps - Writeback… in CalculateWriteBackDISPCLK()