Searched refs:WritebackDelay (Results 1 – 6 of 6) sorted by relevance
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
H A D | display_mode_vba_32.c | 602 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = mode_lib->vba.WritebackLatency in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 613 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 617 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 618 dml_max(v->WritebackDelay[mode_lib->vba.VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 637 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 638 v->WritebackDelay[mode_lib->vba.VoltageLevel][j]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 700 dml_ceil((double) v->WritebackDelay[mode_lib->vba.VoltageLevel][k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 711 k, v->WritebackDelay[mode_lib->vba.VoltageLevel][k]); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1446 dml_ceil(v->WritebackDelay[mode_lib->vba.VoltageLevel][k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
H A D | display_mode_vba_31.c | 2503 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackLatency 2514 v->WritebackDelay[v->VoltageLevel][k] = 0; 2517 v->WritebackDelay[v->VoltageLevel][k] = dml_max( 2518 v->WritebackDelay[v->VoltageLevel][k], 2537 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackDelay[v->VoltageLevel][j]; 2547 (double) v->WritebackDelay[v->VoltageLevel][k] 2556 …dml_print("DML::%s: k=%d WritebackDelay = %f\n", __func__, k, v->WritebackDelay[v->VoltageLevel][k… 3153 …+ dml_max(1.0, dml_ceil(v->WritebackDelay[v->VoltageLevel][k] / (v->HTotal[k] / v->PixelClock[k]),…
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/linux/drivers/gpu/drm/amd/display/dc/dml/ |
H A D | display_mode_vba.h | 827 double WritebackDelay[DC__VOLTAGE_STATES][DC__NUM_DPP__MAX]; member
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/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
H A D | dml2_core_shared_types.h | 608 double WritebackDelay[DML2_MAX_PLANES]; member
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H A D | dml2_core_shared.c | 10453 mode_lib->mp.WritebackDelay[k] = in dml2_core_shared_mode_programming() 10465 mode_lib->mp.WritebackDelay[k] = 0; in dml2_core_shared_mode_programming() 10470 mode_lib->mp.WritebackDelay[k] = in dml2_core_shared_mode_programming() 10472 mode_lib->mp.WritebackDelay[k], in dml2_core_shared_mode_programming() 10491 mode_lib->mp.WritebackDelay[k] = mode_lib->mp.WritebackDelay[j]; in dml2_core_shared_mode_programming() 10588 mode_lib->mp.WritebackDelay[k]); in dml2_core_shared_mode_programming() 10592 dml2_printf("DML::%s: k=%u WritebackDelay = %f\n", __func__, k, mode_lib->mp.WritebackDelay[k]); in dml2_core_shared_mode_programming()
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/linux/drivers/gpu/drm/amd/display/dc/dml2/ |
H A D | display_mode_core_structs.h | 1004 dml_float_t WritebackDelay[__DML_NUM_PLANES__]; member
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