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Searched refs:WREG32_SOC15_OFFSET (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfxhub_v3_0_3.c127 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v3_0_3_setup_vm_pt_regs()
131 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v3_0_3_setup_vm_pt_regs()
327 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config()
329 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v3_0_3_setup_vmid_config()
331 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v3_0_3_setup_vmid_config()
333 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v3_0_3_setup_vmid_config()
336 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v3_0_3_setup_vmid_config()
350 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v3_0_3_program_invalidation()
352 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v3_0_3_program_invalidation()
381 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL, in gfxhub_v3_0_3_gart_disable()
H A Dgfxhub_v2_0.c125 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v2_0_setup_vm_pt_regs()
129 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v2_0_setup_vm_pt_regs()
315 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
317 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_0_setup_vmid_config()
319 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_0_setup_vmid_config()
321 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_0_setup_vmid_config()
324 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_0_setup_vmid_config()
338 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v2_0_program_invalidation()
340 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v2_0_program_invalidation()
369 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL, in gfxhub_v2_0_gart_disable()
H A Dgfxhub_v11_5_0.c129 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v11_5_0_setup_vm_pt_regs()
133 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v11_5_0_setup_vm_pt_regs()
325 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, in gfxhub_v11_5_0_setup_vmid_config()
327 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v11_5_0_setup_vmid_config()
329 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v11_5_0_setup_vmid_config()
331 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v11_5_0_setup_vmid_config()
334 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v11_5_0_setup_vmid_config()
348 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v11_5_0_program_invalidation()
350 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v11_5_0_program_invalidation()
391 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL, in gfxhub_v11_5_0_gart_disable()
H A Dmmhub_v3_0_2.c134 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v3_0_2_setup_vm_pt_regs()
138 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v3_0_2_setup_vm_pt_regs()
344 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config()
346 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v3_0_2_setup_vmid_config()
348 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v3_0_2_setup_vmid_config()
350 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v3_0_2_setup_vmid_config()
353 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v3_0_2_setup_vmid_config()
367 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in mmhub_v3_0_2_program_invalidation()
369 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in mmhub_v3_0_2_program_invalidation()
398 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_CNTL, in mmhub_v3_0_2_gart_disable()
H A Dgfxhub_v3_0.c124 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v3_0_setup_vm_pt_regs()
128 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v3_0_setup_vm_pt_regs()
322 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config()
324 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v3_0_setup_vmid_config()
326 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v3_0_setup_vmid_config()
328 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v3_0_setup_vmid_config()
331 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v3_0_setup_vmid_config()
345 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v3_0_program_invalidation()
347 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v3_0_program_invalidation()
388 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL, in gfxhub_v3_0_gart_disable()
H A Dgfxhub_v12_0.c132 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v12_0_setup_vm_pt_regs()
136 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v12_0_setup_vm_pt_regs()
330 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, in gfxhub_v12_0_setup_vmid_config()
332 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v12_0_setup_vmid_config()
334 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v12_0_setup_vmid_config()
336 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v12_0_setup_vmid_config()
339 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v12_0_setup_vmid_config()
353 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v12_0_program_invalidation()
355 WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v12_0_program_invalidation()
396 WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL, in gfxhub_v12_0_gart_disable()
H A Dmmhub_v3_0_1.c150 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v3_0_1_setup_vm_pt_regs()
154 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v3_0_1_setup_vm_pt_regs()
346 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
348 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v3_0_1_setup_vmid_config()
350 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v3_0_1_setup_vmid_config()
352 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v3_0_1_setup_vmid_config()
355 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v3_0_1_setup_vmid_config()
369 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in mmhub_v3_0_1_program_invalidation()
371 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in mmhub_v3_0_1_program_invalidation()
400 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_CNTL, in mmhub_v3_0_1_gart_disable()
H A Dmmhub_v3_0.c141 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v3_0_setup_vm_pt_regs()
145 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v3_0_setup_vm_pt_regs()
352 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config()
354 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v3_0_setup_vmid_config()
356 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v3_0_setup_vmid_config()
358 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v3_0_setup_vmid_config()
361 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v3_0_setup_vmid_config()
375 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in mmhub_v3_0_program_invalidation()
377 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in mmhub_v3_0_program_invalidation()
406 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_CNTL, in mmhub_v3_0_gart_disable()
H A Dmmhub_v2_3.c126 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v2_3_setup_vm_pt_regs()
129 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v2_3_setup_vm_pt_regs()
314 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
316 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v2_3_setup_vmid_config()
318 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v2_3_setup_vmid_config()
320 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v2_3_setup_vmid_config()
323 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v2_3_setup_vmid_config()
337 WREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v2_3_program_invalidation()
340 WREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v2_3_program_invalidation()
382 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT0_CNTL, in mmhub_v2_3_gart_disable()
H A Dmmhub_v4_1_0.c133 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v4_1_0_setup_vm_pt_regs()
137 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v4_1_0_setup_vm_pt_regs()
345 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, in mmhub_v4_1_0_setup_vmid_config()
347 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v4_1_0_setup_vmid_config()
349 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v4_1_0_setup_vmid_config()
351 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v4_1_0_setup_vmid_config()
354 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v4_1_0_setup_vmid_config()
368 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in mmhub_v4_1_0_program_invalidation()
370 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in mmhub_v4_1_0_program_invalidation()
399 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_CNTL, in mmhub_v4_1_0_gart_disable()
H A Dmmhub_v3_3.c276 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v3_3_init_system_aperture_regs()
280 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v3_3_init_system_aperture_regs()
474 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, in mmhub_v3_3_init_saw_regs()
476 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v3_3_init_saw_regs()
478 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v3_3_init_saw_regs()
480 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v3_3_init_saw_regs()
483 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v3_3_init_saw_regs()
497 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in mmhub_v3_3_init_saw_regs()
499 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in mmhub_v3_3_init_saw_regs()
577 WREG32_SOC15_OFFSET(MMHU in mmhub_v3_3_set_fault_enable_default()
[all...]
H A Djpeg_v5_0_1.c285 WREG32_SOC15_OFFSET(VCN, GET_INST(VCN, i), regVCN_JPEG_DB_CTRL, in jpeg_v5_0_1_hw_init()
420 WREG32_SOC15_OFFSET(JPEG, jpeg_inst, in jpeg_v5_0_1_init_jrbc()
423 WREG32_SOC15_OFFSET(JPEG, jpeg_inst, in jpeg_v5_0_1_init_jrbc()
427 WREG32_SOC15_OFFSET(JPEG, jpeg_inst, in jpeg_v5_0_1_init_jrbc()
430 WREG32_SOC15_OFFSET(JPEG, jpeg_inst, in jpeg_v5_0_1_init_jrbc()
433 WREG32_SOC15_OFFSET(JPEG, jpeg_inst, in jpeg_v5_0_1_init_jrbc()
436 WREG32_SOC15_OFFSET(JPEG, jpeg_inst, in jpeg_v5_0_1_init_jrbc()
439 WREG32_SOC15_OFFSET(JPEG, jpeg_inst, in jpeg_v5_0_1_init_jrbc()
442 WREG32_SOC15_OFFSET(JPEG, jpeg_inst, in jpeg_v5_0_1_init_jrbc()
650 WREG32_SOC15_OFFSET(JPE in jpeg_v5_0_1_dec_ring_set_wptr()
[all...]
H A Dmmhub_v1_0.c59 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v1_0_setup_vm_pt_regs()
63 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v1_0_setup_vm_pt_regs()
319 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config()
321 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v1_0_setup_vmid_config()
323 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v1_0_setup_vmid_config()
325 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v1_0_setup_vmid_config()
328 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v1_0_setup_vmid_config()
343 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in mmhub_v1_0_program_invalidation()
345 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in mmhub_v1_0_program_invalidation()
398 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_CNTL, in mmhub_v1_0_gart_disable()
H A Dsoc15_common.h96 #define WREG32_SOC15_OFFSET(ip, inst, reg, offset, value) \ macro
H A Dgfx_v11_0.c2094 WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_BASE, 2 * i, 0); in gfx_v11_0_init_gds_vmid()
2095 WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_SIZE, 2 * i, 0); in gfx_v11_0_init_gds_vmid()
2096 WREG32_SOC15_OFFSET(GC, 0, regGDS_GWS_VMID0, i, 0); in gfx_v11_0_init_gds_vmid()
2097 WREG32_SOC15_OFFSET(GC, 0, regGDS_OA_VMID0, i, 0); in gfx_v11_0_init_gds_vmid()
2112 WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_BASE, 2 * vmid, 0); in gfx_v11_0_get_tcc_info()
2113 WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_SIZE, 2 * vmid, 0); in gfx_v11_0_get_tcc_info()
2114 WREG32_SOC15_OFFSET(GC, 0, regGDS_GWS_VMID0, vmid, 0); in gfx_v11_0_get_tcc_info()
2115 WREG32_SOC15_OFFSET(GC, 0, regGDS_OA_VMID0, vmid, 0); in gfx_v11_0_get_tcc_info()
H A Dgfx_v10_0.c5226 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * i, 0); in gfx_v10_0_init_compute_vmid()
5227 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * i, 0); in gfx_v10_0_init_compute_vmid()
5228 WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, i, 0); in gfx_v10_0_init_compute_vmid()
5229 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, i, 0); in gfx_v10_0_init_compute_vmid()
5247 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * vmid, 0); in gfx_v10_0_init_gds_vmid()
5248 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * vmid, 0); in gfx_v10_0_init_gds_vmid()
5249 WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, vmid, 0); in gfx_v10_0_init_gds_vmid()
5250 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, vmid, 0); in gfx_v10_0_init_gds_vmid()