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Searched refs:WREG32_SOC15_DPG_MODE (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_5.c442 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_5_mc_resume_dpg_mode()
446 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_5_mc_resume_dpg_mode()
450 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_5_mc_resume_dpg_mode()
453 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_5_mc_resume_dpg_mode()
455 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_5_mc_resume_dpg_mode()
457 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_5_mc_resume_dpg_mode()
462 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_5_mc_resume_dpg_mode()
465 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_5_mc_resume_dpg_mode()
469 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_5_mc_resume_dpg_mode()
475 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_5_mc_resume_dpg_mode()
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H A Dvcn_v4_0_3.c463 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_3_mc_resume_dpg_mode()
467 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_3_mc_resume_dpg_mode()
471 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_3_mc_resume_dpg_mode()
474 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_3_mc_resume_dpg_mode()
476 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_3_mc_resume_dpg_mode()
478 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_3_mc_resume_dpg_mode()
483 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_3_mc_resume_dpg_mode()
486 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_3_mc_resume_dpg_mode()
490 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_3_mc_resume_dpg_mode()
496 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_3_mc_resume_dpg_mode()
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H A Dvcn_v2_5.c525 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v2_5_mc_resume_dpg_mode()
528 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v2_5_mc_resume_dpg_mode()
531 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v2_5_mc_resume_dpg_mode()
534 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v2_5_mc_resume_dpg_mode()
536 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v2_5_mc_resume_dpg_mode()
538 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v2_5_mc_resume_dpg_mode()
543 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v2_5_mc_resume_dpg_mode()
546 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v2_5_mc_resume_dpg_mode()
550 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v2_5_mc_resume_dpg_mode()
556 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v2_5_mc_resume_dpg_mode()
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H A Dvcn_v2_0.c439 WREG32_SOC15_DPG_MODE(0, SOC15_DPG_MODE_OFFSET( in vcn_v2_0_mc_resume_dpg_mode()
442 WREG32_SOC15_DPG_MODE(0, SOC15_DPG_MODE_OFFSET( in vcn_v2_0_mc_resume_dpg_mode()
445 WREG32_SOC15_DPG_MODE(0, SOC15_DPG_MODE_OFFSET( in vcn_v2_0_mc_resume_dpg_mode()
448 WREG32_SOC15_DPG_MODE(0, SOC15_DPG_MODE_OFFSET( in vcn_v2_0_mc_resume_dpg_mode()
450 WREG32_SOC15_DPG_MODE(0, SOC15_DPG_MODE_OFFSET( in vcn_v2_0_mc_resume_dpg_mode()
452 WREG32_SOC15_DPG_MODE(0, SOC15_DPG_MODE_OFFSET( in vcn_v2_0_mc_resume_dpg_mode()
457 WREG32_SOC15_DPG_MODE(0, SOC15_DPG_MODE_OFFSET( in vcn_v2_0_mc_resume_dpg_mode()
460 WREG32_SOC15_DPG_MODE(0, SOC15_DPG_MODE_OFFSET( in vcn_v2_0_mc_resume_dpg_mode()
464 WREG32_SOC15_DPG_MODE(0, SOC15_DPG_MODE_OFFSET( in vcn_v2_0_mc_resume_dpg_mode()
470 WREG32_SOC15_DPG_MODE(0, SOC15_DPG_MODE_OFFSET( in vcn_v2_0_mc_resume_dpg_mode()
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H A Dvcn_v4_0.c493 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_mc_resume_dpg_mode()
496 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_mc_resume_dpg_mode()
499 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_mc_resume_dpg_mode()
502 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_mc_resume_dpg_mode()
504 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_mc_resume_dpg_mode()
506 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_mc_resume_dpg_mode()
511 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_mc_resume_dpg_mode()
514 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_mc_resume_dpg_mode()
518 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_mc_resume_dpg_mode()
524 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v4_0_mc_resume_dpg_mode()
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H A Dvcn_v3_0.c551 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v3_0_mc_resume_dpg_mode()
554 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v3_0_mc_resume_dpg_mode()
557 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v3_0_mc_resume_dpg_mode()
560 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v3_0_mc_resume_dpg_mode()
562 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v3_0_mc_resume_dpg_mode()
564 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v3_0_mc_resume_dpg_mode()
569 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v3_0_mc_resume_dpg_mode()
572 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v3_0_mc_resume_dpg_mode()
576 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v3_0_mc_resume_dpg_mode()
582 WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET( in vcn_v3_0_mc_resume_dpg_mode()
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H A Damdgpu_vcn.h144 #define WREG32_SOC15_DPG_MODE(inst_idx, offset, value, mask_en, indirect) \ macro