/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | vce_v3_0.c | 165 WREG32_FIELD(VCE_RB_ARB_CTRL, VCE_CGTT_OVERRIDE, override ? 1 : 0); in vce_v3_0_override_vce_clock_gating() 249 WREG32_FIELD(VCE_SOFT_RESET, ECPU_SOFT_RESET, 1); in vce_v3_0_firmware_loaded() 251 WREG32_FIELD(VCE_SOFT_RESET, ECPU_SOFT_RESET, 0); in vce_v3_0_firmware_loaded() 303 WREG32_FIELD(VCE_STATUS, JOB_BUSY, 1); in vce_v3_0_start() 308 WREG32_FIELD(VCE_VCPU_CNTL, CLK_EN, 1); in vce_v3_0_start() 310 WREG32_FIELD(VCE_SOFT_RESET, ECPU_SOFT_RESET, 0); in vce_v3_0_start() 316 WREG32_FIELD(VCE_STATUS, JOB_BUSY, 0); in vce_v3_0_start() 345 WREG32_FIELD(VCE_VCPU_CNTL, CLK_EN, 0); in vce_v3_0_stop() 348 WREG32_FIELD(VCE_SOFT_RESET, ECPU_SOFT_RESET, 1); in vce_v3_0_stop() 597 WREG32_FIELD(VCE_SYS_INT_EN, VCE_SYS_INT_TRAP_INTERRUPT_EN, 1); in vce_v3_0_mc_resume() [all …]
|
H A D | gfx_v8_0.c | 3749 WREG32_FIELD(GRBM_CNTL, READ_TIMEOUT, 0xFF); in gfx_v8_0_constants_init() 3966 WREG32_FIELD(RLC_SRM_CNTL, AUTO_INCR_ADDR, 1); in gfx_v8_0_init_save_restore_list() 4005 WREG32_FIELD(RLC_SRM_CNTL, SRM_ENABLE, 1); in gfx_v8_0_enable_save_restore_machine() 4012 WREG32_FIELD(CP_RB_WPTR_POLL_CNTL, IDLE_POLL_COUNT, 0x60); in gfx_v8_0_init_power_gating() 4020 WREG32_FIELD(RLC_PG_DELAY_2, SERDES_CMD_DELAY, 0x3); in gfx_v8_0_init_power_gating() 4021 WREG32_FIELD(RLC_AUTO_PG_CTRL, GRBM_REG_SAVE_GFX_IDLE_THRESHOLD, 0x55f0); in gfx_v8_0_init_power_gating() 4028 WREG32_FIELD(RLC_PG_CNTL, SMU_CLK_SLOWDOWN_ON_PU_ENABLE, enable ? 1 : 0); in cz_enable_sck_slow_down_on_power_up() 4034 WREG32_FIELD(RLC_PG_CNTL, SMU_CLK_SLOWDOWN_ON_PD_ENABLE, enable ? 1 : 0); in cz_enable_sck_slow_down_on_power_down() 4039 WREG32_FIELD(RLC_PG_CNTL, CP_PG_DISABLE, enable ? 0 : 1); in cz_enable_cp_power_gating() 4065 WREG32_FIELD(RLC_CNTL, RLC_ENABLE_F32, 0); in gfx_v8_0_rlc_stop() [all …]
|
H A D | uvd_v6_0.c | 742 WREG32_FIELD(UVD_MASTINT_EN, VCPU_EN, 0); in uvd_v6_0_start() 745 WREG32_FIELD(UVD_LMI_CTRL2, STALL_ARB_UMC, 1); in uvd_v6_0_start() 761 WREG32_FIELD(SRBM_SOFT_RESET, SOFT_RESET_UVD, 0); in uvd_v6_0_start() 796 WREG32_FIELD(UVD_LMI_CTRL2, STALL_ARB_UMC, 0); in uvd_v6_0_start() 816 WREG32_FIELD(UVD_SOFT_RESET, VCPU_SOFT_RESET, 1); in uvd_v6_0_start() 818 WREG32_FIELD(UVD_SOFT_RESET, VCPU_SOFT_RESET, 0); in uvd_v6_0_start() 863 WREG32_FIELD(UVD_RBC_RB_CNTL, RB_NO_FETCH, 0); in uvd_v6_0_start()
|
H A D | gfx_v6_0.c | 2394 WREG32_FIELD(RLC_LB_CNTL, LOAD_BALANCE_ENABLE, enable ? 1 : 0); in gfx_v6_0_enable_lbpw() 2463 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v6_0_rlc_reset() 2465 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); in gfx_v6_0_rlc_reset() 2738 WREG32_FIELD(RLC_PG_CNTL, GFX_POWER_GATING_ENABLE, 1); in gfx_v6_0_enable_gfx_cgpg() 2739 WREG32_FIELD(RLC_AUTO_PG_CTRL, AUTO_PG_EN, 1); in gfx_v6_0_enable_gfx_cgpg() 2741 WREG32_FIELD(RLC_AUTO_PG_CTRL, AUTO_PG_EN, 0); in gfx_v6_0_enable_gfx_cgpg() 2791 WREG32_FIELD(RLC_PG_CNTL, GFX_POWER_GATING_SRC, 1); in gfx_v6_0_init_gfx_cgpg()
|
H A D | amdgpu_amdkfd_gfx_v8.c | 408 WREG32_FIELD(RLC_CP_SCHEDULERS, scheduler1, 0); in kgd_hqd_destroy()
|
H A D | uvd_v3_1.c | 211 WREG32_FIELD(UVD_CGC_GATE, REGS, 0); in uvd_v3_1_set_dcm()
|
H A D | uvd_v4_2.c | 639 WREG32_FIELD(UVD_CGC_GATE, REGS, 0); in uvd_v4_2_set_dcm()
|
H A D | amdgpu.h | 1375 #define WREG32_FIELD(reg, field, val) \ macro
|
/linux/drivers/accel/habanalabs/common/ |
H A D | habanalabs.h | 2614 #define WREG32_FIELD(reg, offset, field, val) \ macro
|
/linux/drivers/accel/habanalabs/goya/ |
H A D | goya.c | 1799 WREG32_FIELD(TPC0_CFG_MSS_CONFIG, offset, in goya_init_golden_registers()
|
/linux/drivers/accel/habanalabs/gaudi/ |
H A D | gaudi.c | 2531 WREG32_FIELD(TPC0_CFG_MSS_CONFIG, tpc_offset, in gaudi_init_golden_registers()
|