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Searched refs:WREG32_AND (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dr600_hdmi.c375 WREG32_AND(HDMI0_GENERIC_PACKET_CONTROL + offset, in r600_set_audio_packet()
402 WREG32_AND(HDMI0_GC + offset, ~HDMI0_GC_AVMUTE); in r600_set_mute()
457 WREG32_AND(HDMI0_INFOFRAME_CONTROL0 + offset, in r600_hdmi_update_audio_settings()
491 WREG32_AND(AVIVO_TMDSA_CNTL, ~AVIVO_TMDSA_CNTL_HDMI_EN); in r600_hdmi_enable()
499 WREG32_AND(AVIVO_LVTMA_CNTL, ~AVIVO_LVTMA_CNTL_HDMI_EN); in r600_hdmi_enable()
507 WREG32_AND(DDIA_CNTL, ~DDIA_HDMI_EN); in r600_hdmi_enable()
H A Devergreen_hdmi.c399 WREG32_AND(HDMI_GC + offset, ~HDMI_GC_AVMUTE); in dce4_set_mute()
427 WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, in evergreen_hdmi_enable()
431 WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, in evergreen_hdmi_enable()
485 WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, in evergreen_dp_enable()
H A Ddce3_1_afmt.c232 WREG32_AND(HDMI0_GC + offset, ~HDMI0_GC_AVMUTE); in dce3_2_set_mute()
H A Devergreen.c1751 WREG32_AND(DC_HPDx_INT_CONTROL(hpd), ~DC_HPDx_INT_POLARITY); in evergreen_hpd_set_polarity()
4486 WREG32_AND(DC_HPDx_INT_CONTROL(i), DC_HPDx_INT_POLARITY); in evergreen_disable_interrupt_state()
H A Dradeon.h2543 #define WREG32_AND(reg, and) WREG32_P(reg, 0, and) macro
H A Dsi.c5953 WREG32_AND(DC_HPDx_INT_CONTROL(i), in si_disable_interrupt_state()
/linux/drivers/accel/habanalabs/goya/
H A Dgoya.c720 WREG32_AND(reg, ~0x7FF); in goya_mmu_prepare_reg()
1492 WREG32_AND(mmTPC0_EML_CFG_DBG_CNT + tpc_eml_offset, in _goya_tpc_mbist_workaround()
2694 WREG32_AND(mmSTLB_STLB_FEATURE_EN, in goya_mmu_init()
/linux/drivers/accel/habanalabs/common/
H A Dhabanalabs.h2603 #define WREG32_AND(reg, and) WREG32_P(reg, 0, and) macro
/linux/drivers/accel/habanalabs/gaudi/
H A Dgaudi.c6009 WREG32_AND(mmDMA0_CORE_PROT + dma_offset, in gaudi_debugfs_read_dma()
6047 WREG32_AND(reg, ~0x7FF); in gaudi_mmu_prepare_reg()
/linux/drivers/accel/habanalabs/gaudi2/
H A Dgaudi2.c9075 WREG32_AND(mmu_base + MMU_SPI_SEI_CAUSE_OFFSET, ~spi_sei_cause); in gaudi2_handle_mmu_spi_sei_generic()