Searched refs:VPU_40XX_HOST_SS_ICB_ENABLE_0 (Results 1 – 2 of 2) sorted by relevance
96 #define VPU_40XX_HOST_SS_ICB_ENABLE_0 0x00010240u macro
987 REGV_WR64(VPU_40XX_HOST_SS_ICB_ENABLE_0, ICB_0_1_IRQ_MASK_40XX); in ivpu_hw_ip_irq_enable()997 REGV_WR64(VPU_40XX_HOST_SS_ICB_ENABLE_0, 0x0ull); in ivpu_hw_ip_irq_disable()