Searched refs:VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0 (Results 1 – 2 of 2) sorted by relevance
107 #define VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0 0x00030024u macro
321 u32 val = REGV_RD32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0); in pwr_island_drive_37xx()324 val = REG_SET_FLD(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, CSS_CPU, val); in pwr_island_drive_37xx()326 val = REG_CLR_FLD(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, CSS_CPU, val); in pwr_island_drive_37xx()328 REGV_WR32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, val); in pwr_island_drive_37xx()