Searched refs:VGA_WR08 (Results 1 – 6 of 6) sorted by relevance
| /linux/drivers/video/fbdev/nvidia/ |
| H A D | nv_setup.c | 62 VGA_WR08(par->PCIO, par->IOBase + 0x04, index); in NVWriteCrtc() 63 VGA_WR08(par->PCIO, par->IOBase + 0x05, value); in NVWriteCrtc() 67 VGA_WR08(par->PCIO, par->IOBase + 0x04, index); in NVReadCrtc() 72 VGA_WR08(par->PVIO, VGA_GFX_I, index); in NVWriteGr() 73 VGA_WR08(par->PVIO, VGA_GFX_D, value); in NVWriteGr() 77 VGA_WR08(par->PVIO, VGA_GFX_I, index); in NVReadGr() 82 VGA_WR08(par->PVIO, VGA_SEQ_I, index); in NVWriteSeq() 83 VGA_WR08(par->PVIO, VGA_SEQ_D, value); in NVWriteSeq() 87 VGA_WR08(par->PVIO, VGA_SEQ_I, index); in NVReadSeq() 98 VGA_WR08(par->PCIO, VGA_ATT_IW, index); in NVWriteAttr() [all …]
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| H A D | nv_hw.c | 61 VGA_WR08(par->PCIO, 0x3D4, 0x1F); in NVLockUnlock() 62 VGA_WR08(par->PCIO, 0x3D5, Lock ? 0x99 : 0x57); in NVLockUnlock() 64 VGA_WR08(par->PCIO, 0x3D4, 0x11); in NVLockUnlock() 70 VGA_WR08(par->PCIO, 0x3D5, cr11); in NVLockUnlock() 79 VGA_WR08(par->PCIO, 0x3D4, 0x31); in NVShowHideCursor() 80 VGA_WR08(par->PCIO, 0x3D5, par->CurrentState->cursor1); in NVShowHideCursor() 1544 VGA_WR08(par->PCIO, 0x03D4, 0x53); in NVLoadStateExt() 1545 VGA_WR08(par->PCIO, 0x03D5, state->timingH); in NVLoadStateExt() 1546 VGA_WR08(par->PCIO, 0x03D4, 0x54); in NVLoadStateExt() 1547 VGA_WR08(par->PCIO, 0x03D5, state->timingV); in NVLoadStateExt() [all …]
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| H A D | nv_local.h | 70 #define VGA_WR08(p,i,d) (writeb((d), (void __iomem *)(p) + (i))) macro
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| H A D | nvidia.c | 437 VGA_WR08(par->PCIO, 0x03D4, 0x1C); in nvidia_calc_regs() 637 VGA_WR08(par->PCIO, 0x03D4, 0x44); in nvidiafb_set_par() 638 VGA_WR08(par->PCIO, 0x03D5, par->ModeReg.crtcOwner); in nvidiafb_set_par() 652 VGA_WR08(par->PCIO, 0x3d4, 0x46); in nvidiafb_set_par() 655 VGA_WR08(par->PCIO, 0x3d5, tmp); in nvidiafb_set_par()
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| /linux/drivers/video/fbdev/riva/ |
| H A D | rivafb-i2c.c | 33 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setscl() 41 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setscl() 42 VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1); in riva_gpio_setscl() 51 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setsda() 59 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setsda() 60 VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1); in riva_gpio_setsda() 69 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base); in riva_gpio_getscl() 82 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base); in riva_gpio_getsda()
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| H A D | riva_hw.h | 85 #define VGA_WR08(p,i,d) (writeb((d), (void __iomem *)(p) + (i))) macro
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