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Searched refs:VCN_RB_ENABLE__RB1_EN_MASK (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v5_0_1.c685 tmp &= ~(VCN_RB_ENABLE__RB1_EN_MASK); in vcn_v5_0_1_start_dpg_mode()
696 tmp |= VCN_RB_ENABLE__RB1_EN_MASK; in vcn_v5_0_1_start_dpg_mode()
1030 tmp &= ~(VCN_RB_ENABLE__RB1_EN_MASK); in vcn_v5_0_1_start()
1041 tmp |= VCN_RB_ENABLE__RB1_EN_MASK; in vcn_v5_0_1_start()
H A Dvcn_v5_0_0.c779 tmp &= ~(VCN_RB_ENABLE__RB1_EN_MASK); in vcn_v5_0_0_start_dpg_mode()
790 tmp |= VCN_RB_ENABLE__RB1_EN_MASK; in vcn_v5_0_0_start_dpg_mode()
940 tmp &= ~(VCN_RB_ENABLE__RB1_EN_MASK); in vcn_v5_0_0_start()
951 tmp |= VCN_RB_ENABLE__RB1_EN_MASK; in vcn_v5_0_0_start()
H A Dvcn_v4_0_5.c1019 tmp &= ~(VCN_RB_ENABLE__RB1_EN_MASK); in vcn_v4_0_5_start_dpg_mode()
1030 tmp |= VCN_RB_ENABLE__RB1_EN_MASK; in vcn_v4_0_5_start_dpg_mode()
1209 tmp &= ~(VCN_RB_ENABLE__RB1_EN_MASK); in vcn_v4_0_5_start()
1220 tmp |= VCN_RB_ENABLE__RB1_EN_MASK; in vcn_v4_0_5_start()
H A Dvcn_v4_0.c1107 tmp &= ~(VCN_RB_ENABLE__RB1_EN_MASK); in vcn_v4_0_start_dpg_mode()
1118 tmp |= VCN_RB_ENABLE__RB1_EN_MASK; in vcn_v4_0_start_dpg_mode()
1297 tmp &= ~(VCN_RB_ENABLE__RB1_EN_MASK); in vcn_v4_0_start()
1308 tmp |= VCN_RB_ENABLE__RB1_EN_MASK; in vcn_v4_0_start()
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_5_0_0_sh_mask.h5869 #define VCN_RB_ENABLE__RB1_EN_MASK … macro
H A Dvcn_4_0_5_sh_mask.h6687 #define VCN_RB_ENABLE__RB1_EN_MASK … macro
H A Dvcn_4_0_0_sh_mask.h6851 #define VCN_RB_ENABLE__RB1_EN_MASK … macro
H A Dvcn_4_0_3_sh_mask.h7678 #define VCN_RB_ENABLE__RB1_EN_MASK … macro