Searched refs:V4L2_DV_VSYNC_POS_POL (Results 1 – 10 of 10) sorted by relevance
340 if (bt->polarities & V4L2_DV_VSYNC_POS_POL) { in ths8200_setup()
1438 (stdi->vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0), in stdi2dv_timings()1443 (stdi->vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0), in stdi2dv_timings()1580 bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? V4L2_DV_VSYNC_POS_POL : 0) | in adv7842_query_dv_timings()
1036 ((bt->polarities & V4L2_DV_VSYNC_POS_POL) ? 0 : 0x40) | in adv7511_s_dv_timings()
1152 timings->bt.polarities = vsync_pos ? V4L2_DV_VSYNC_POS_POL : 0; in tda1997x_detect_std()
327 bt->polarities = (polarity & BIT(4) ? V4L2_DV_VSYNC_POS_POL : 0) | in adv748x_hdmi_query_dv_timings()
110 (``V4L2_DV_VSYNC_POS_POL``) is for vertical sync polarity and bit
81 timings->bt.polarities |= V4L2_DV_VSYNC_POS_POL; in get_timings()
162 timings->bt.polarities |= V4L2_DV_VSYNC_POS_POL; in get_timings()
1593 #define V4L2_DV_VSYNC_POS_POL 0x00000001 macro
321 replace define V4L2_DV_VSYNC_POS_POL :c:type:`v4l2_bt_timings`