Home
last modified time | relevance | path

Searched refs:UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h662 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK … macro
H A Duvd_3_1_sh_mask.h529 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK 0x1fffff macro
H A Duvd_4_2_sh_mask.h533 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK 0x1fffff macro
H A Duvd_4_0_sh_mask.h756 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK 0x001fffffL macro
H A Duvd_5_0_sh_mask.h565 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK 0x1fffff macro
H A Duvd_6_0_sh_mask.h567 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK 0x1fffff macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1182 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK … macro
H A Dvcn_2_5_sh_mask.h2692 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK … macro
H A Dvcn_2_0_0_sh_mask.h2688 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK … macro
H A Dvcn_2_6_0_sh_mask.h45 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK … macro
H A Dvcn_3_0_0_sh_mask.h3750 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK … macro
H A Dvcn_5_0_0_sh_mask.h3694 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK … macro
H A Dvcn_4_0_5_sh_mask.h3862 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK … macro
H A Dvcn_4_0_0_sh_mask.h3996 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK … macro
H A Dvcn_4_0_3_sh_mask.h4031 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2_MASK … macro