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Searched refs:UVD_SUVD_CGC_STATUS__SMP_DCLK_MASK (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_5_0_sh_mask.h759 #define UVD_SUVD_CGC_STATUS__SMP_DCLK_MASK 0x8 macro
H A Duvd_6_0_sh_mask.h757 #define UVD_SUVD_CGC_STATUS__SMP_DCLK_MASK 0x8 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h511 #define UVD_SUVD_CGC_STATUS__SMP_DCLK_MASK macro
H A Dvcn_2_5_sh_mask.h2142 #define UVD_SUVD_CGC_STATUS__SMP_DCLK_MASK macro
H A Dvcn_2_0_0_sh_mask.h3268 #define UVD_SUVD_CGC_STATUS__SMP_DCLK_MASK macro
H A Dvcn_2_6_0_sh_mask.h3813 #define UVD_SUVD_CGC_STATUS__SMP_DCLK_MASK macro
H A Dvcn_3_0_0_sh_mask.h2887 #define UVD_SUVD_CGC_STATUS__SMP_DCLK_MASK macro
H A Dvcn_5_0_0_sh_mask.h3496 #define UVD_SUVD_CGC_STATUS__SMP_DCLK_MASK macro
H A Dvcn_4_0_5_sh_mask.h3806 #define UVD_SUVD_CGC_STATUS__SMP_DCLK_MASK macro
H A Dvcn_4_0_0_sh_mask.h3940 #define UVD_SUVD_CGC_STATUS__SMP_DCLK_MASK macro
H A Dvcn_4_0_3_sh_mask.h3975 #define UVD_SUVD_CGC_STATUS__SMP_DCLK_MASK macro