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Searched refs:UVD_SUVD_CGC_STATUS__SIT_H264_DCLK_MASK (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_5_0_sh_mask.h769 #define UVD_SUVD_CGC_STATUS__SIT_H264_DCLK_MASK 0x100 macro
H A Duvd_6_0_sh_mask.h767 #define UVD_SUVD_CGC_STATUS__SIT_H264_DCLK_MASK 0x100 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h516 #define UVD_SUVD_CGC_STATUS__SIT_H264_DCLK_MASK … macro
H A Dvcn_2_5_sh_mask.h2147 #define UVD_SUVD_CGC_STATUS__SIT_H264_DCLK_MASK … macro
H A Dvcn_2_0_0_sh_mask.h3273 #define UVD_SUVD_CGC_STATUS__SIT_H264_DCLK_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3818 #define UVD_SUVD_CGC_STATUS__SIT_H264_DCLK_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2892 #define UVD_SUVD_CGC_STATUS__SIT_H264_DCLK_MASK … macro
H A Dvcn_5_0_0_sh_mask.h3501 #define UVD_SUVD_CGC_STATUS__SIT_H264_DCLK_MASK … macro
H A Dvcn_4_0_5_sh_mask.h3811 #define UVD_SUVD_CGC_STATUS__SIT_H264_DCLK_MASK … macro
H A Dvcn_4_0_0_sh_mask.h3945 #define UVD_SUVD_CGC_STATUS__SIT_H264_DCLK_MASK … macro
H A Dvcn_4_0_3_sh_mask.h3980 #define UVD_SUVD_CGC_STATUS__SIT_H264_DCLK_MASK … macro