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Searched refs:UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK_MASK (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_5_0_sh_mask.h779 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK_MASK 0x2000 macro
H A Duvd_6_0_sh_mask.h777 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK_MASK 0x2000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h521 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK_MASK … macro
H A Dvcn_2_5_sh_mask.h2152 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK_MASK … macro
H A Dvcn_2_0_0_sh_mask.h3278 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3823 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2897 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK_MASK … macro
H A Dvcn_5_0_0_sh_mask.h3506 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK_MASK … macro
H A Dvcn_4_0_5_sh_mask.h3816 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK_MASK … macro
H A Dvcn_4_0_0_sh_mask.h3950 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK_MASK … macro
H A Dvcn_4_0_3_sh_mask.h3985 #define UVD_SUVD_CGC_STATUS__SDB_HEVC_DCLK_MASK … macro