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Searched refs:UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK__SHIFT (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h507 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK__SHIFT macro
H A Dvcn_2_5_sh_mask.h2137 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK__SHIFT macro
H A Dvcn_2_0_0_sh_mask.h3263 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK__SHIFT macro
H A Dvcn_2_6_0_sh_mask.h3808 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK__SHIFT macro
H A Dvcn_3_0_0_sh_mask.h2879 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK__SHIFT macro
H A Dvcn_5_0_0_sh_mask.h3488 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK__SHIFT macro
H A Dvcn_4_0_5_sh_mask.h3798 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK__SHIFT macro
H A Dvcn_4_0_0_sh_mask.h3932 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK__SHIFT macro
H A Dvcn_4_0_3_sh_mask.h3967 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK__SHIFT macro