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Searched refs:UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK_MASK (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h535 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK_MASK … macro
H A Dvcn_2_5_sh_mask.h2166 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK_MASK … macro
H A Dvcn_2_0_0_sh_mask.h3292 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3837 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2911 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK_MASK … macro
H A Dvcn_5_0_0_sh_mask.h3520 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK_MASK … macro
H A Dvcn_4_0_5_sh_mask.h3830 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK_MASK … macro
H A Dvcn_4_0_0_sh_mask.h3964 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK_MASK … macro
H A Dvcn_4_0_3_sh_mask.h3999 #define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK_MASK … macro