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Searched refs:UVD_SUVD_CGC_STATUS2__MPC1_VCLK__SHIFT (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_3_0_0_sh_mask.h3679 #define UVD_SUVD_CGC_STATUS2__MPC1_VCLK__SHIFT macro
H A Dvcn_5_0_0_sh_mask.h3112 #define UVD_SUVD_CGC_STATUS2__MPC1_VCLK__SHIFT macro
H A Dvcn_4_0_5_sh_mask.h3512 #define UVD_SUVD_CGC_STATUS2__MPC1_VCLK__SHIFT macro
H A Dvcn_4_0_0_sh_mask.h3560 #define UVD_SUVD_CGC_STATUS2__MPC1_VCLK__SHIFT macro
H A Dvcn_4_0_3_sh_mask.h3591 #define UVD_SUVD_CGC_STATUS2__MPC1_VCLK__SHIFT macro