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Searched refs:UVD_SUVD_CGC_GATE__SRE_MASK (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h226 #define UVD_SUVD_CGC_GATE__SRE_MASK … macro
H A Duvd_5_0_sh_mask.h723 #define UVD_SUVD_CGC_GATE__SRE_MASK 0x1 macro
H A Duvd_6_0_sh_mask.h725 #define UVD_SUVD_CGC_GATE__SRE_MASK 0x1 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h454 #define UVD_SUVD_CGC_GATE__SRE_MASK … macro
H A Dvcn_2_5_sh_mask.h2083 #define UVD_SUVD_CGC_GATE__SRE_MASK … macro
H A Dvcn_2_0_0_sh_mask.h3209 #define UVD_SUVD_CGC_GATE__SRE_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3754 #define UVD_SUVD_CGC_GATE__SRE_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2819 #define UVD_SUVD_CGC_GATE__SRE_MASK … macro
H A Dvcn_5_0_0_sh_mask.h1141 #define UVD_SUVD_CGC_GATE__SRE_MASK … macro
H A Dvcn_4_0_5_sh_mask.h1332 #define UVD_SUVD_CGC_GATE__SRE_MASK … macro
H A Dvcn_4_0_0_sh_mask.h1336 #define UVD_SUVD_CGC_GATE__SRE_MASK … macro
H A Dvcn_4_0_3_sh_mask.h1336 #define UVD_SUVD_CGC_GATE__SRE_MASK … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_5.c706 data |= (UVD_SUVD_CGC_GATE__SRE_MASK in vcn_v4_0_5_disable_clock_gating()
H A Dvcn_v2_0.c597 data |= (UVD_SUVD_CGC_GATE__SRE_MASK in vcn_v2_0_disable_clock_gating()
H A Dvcn_v1_0.c570 data |= (UVD_SUVD_CGC_GATE__SRE_MASK in vcn_v1_0_disable_clock_gating()
H A Dvcn_v2_5.c687 data |= (UVD_SUVD_CGC_GATE__SRE_MASK in vcn_v2_5_disable_clock_gating()
H A Dvcn_v3_0.c805 data |= (UVD_SUVD_CGC_GATE__SRE_MASK in vcn_v3_0_disable_clock_gating()