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Searched refs:UVD_SUVD_CGC_GATE__SDB_H264_MASK (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Duvd_v6_0.c676 UVD_SUVD_CGC_GATE__SDB_H264_MASK |
709 UVD_SUVD_CGC_GATE__SDB_H264_MASK |
1299 UVD_SUVD_CGC_GATE__SDB_H264_MASK | in uvd_v6_0_enable_clock_gating()
H A Dvcn_v4_0_5.c752 | UVD_SUVD_CGC_GATE__SDB_H264_MASK
H A Dvcn_v4_0_3.c694 | UVD_SUVD_CGC_GATE__SDB_H264_MASK in vcn_v4_0_3_disable_clock_gating_dpg_mode()
H A Dvcn_v1_0.c587 | UVD_SUVD_CGC_GATE__SDB_H264_MASK in vcn_v1_0_disable_clock_gating()
H A Dvcn_v2_0.c614 | UVD_SUVD_CGC_GATE__SDB_H264_MASK in vcn_v2_0_disable_clock_gating()
H A Dvcn_v2_5.c848 | UVD_SUVD_CGC_GATE__SDB_H264_MASK in vcn_v2_6_enable_ras()
H A Dvcn_v4_0.c825 | UVD_SUVD_CGC_GATE__SDB_H264_MASK
H A Dvcn_v3_0.c851 | UVD_SUVD_CGC_GATE__SDB_H264_MASK in vcn_v3_0_disable_clock_gating()
/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h237 #define UVD_SUVD_CGC_GATE__SDB_H264_MASK … macro
H A Duvd_5_0_sh_mask.h745 #define UVD_SUVD_CGC_GATE__SDB_H264_MASK 0x800 macro
H A Duvd_6_0_sh_mask.h747 #define UVD_SUVD_CGC_GATE__SDB_H264_MASK 0x800 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h465 #define UVD_SUVD_CGC_GATE__SDB_H264_MASK … macro
H A Dvcn_2_5_sh_mask.h2094 #define UVD_SUVD_CGC_GATE__SDB_H264_MASK … macro
H A Dvcn_2_0_0_sh_mask.h3220 #define UVD_SUVD_CGC_GATE__SDB_H264_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3765 #define UVD_SUVD_CGC_GATE__SDB_H264_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2830 #define UVD_SUVD_CGC_GATE__SDB_H264_MASK … macro
H A Dvcn_5_0_0_sh_mask.h1152 #define UVD_SUVD_CGC_GATE__SDB_H264_MASK … macro
H A Dvcn_4_0_5_sh_mask.h1343 #define UVD_SUVD_CGC_GATE__SDB_H264_MASK … macro
H A Dvcn_4_0_0_sh_mask.h1347 #define UVD_SUVD_CGC_GATE__SDB_H264_MASK … macro
H A Dvcn_4_0_3_sh_mask.h1347 #define UVD_SUVD_CGC_GATE__SDB_H264_MASK … macro