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Searched refs:UVD_SUVD_CGC_CTRL__MPC1_MODE_MASK (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v3_0.c863 | UVD_SUVD_CGC_CTRL__MPC1_MODE_MASK in vcn_v3_0_disable_clock_gating()
979 | UVD_SUVD_CGC_CTRL__MPC1_MODE_MASK in vcn_v3_0_enable_clock_gating()
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_3_0_0_sh_mask.h2954 #define UVD_SUVD_CGC_CTRL__MPC1_MODE_MASK … macro
H A Dvcn_5_0_0_sh_mask.h2415 #define UVD_SUVD_CGC_CTRL__MPC1_MODE_MASK … macro
H A Dvcn_4_0_5_sh_mask.h2914 #define UVD_SUVD_CGC_CTRL__MPC1_MODE_MASK … macro
H A Dvcn_4_0_0_sh_mask.h2882 #define UVD_SUVD_CGC_CTRL__MPC1_MODE_MASK … macro
H A Dvcn_4_0_3_sh_mask.h2882 #define UVD_SUVD_CGC_CTRL__MPC1_MODE_MASK … macro