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Searched refs:UVD_RB_BASE_HI2__RB_BASE_HI_MASK (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h290 #define UVD_RB_BASE_HI2__RB_BASE_HI_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h630 #define UVD_RB_BASE_HI2__RB_BASE_HI_MASK … macro
H A Dvcn_2_5_sh_mask.h2475 #define UVD_RB_BASE_HI2__RB_BASE_HI_MASK … macro
H A Dvcn_2_0_0_sh_mask.h3595 #define UVD_RB_BASE_HI2__RB_BASE_HI_MASK … macro
H A Dvcn_2_6_0_sh_mask.h4297 #define UVD_RB_BASE_HI2__RB_BASE_HI_MASK … macro
H A Dvcn_3_0_0_sh_mask.h3404 #define UVD_RB_BASE_HI2__RB_BASE_HI_MASK … macro
H A Dvcn_5_0_0_sh_mask.h2879 #define UVD_RB_BASE_HI2__RB_BASE_HI_MASK … macro
H A Dvcn_4_0_5_sh_mask.h3284 #define UVD_RB_BASE_HI2__RB_BASE_HI_MASK … macro
H A Dvcn_4_0_0_sh_mask.h3328 #define UVD_RB_BASE_HI2__RB_BASE_HI_MASK … macro
H A Dvcn_4_0_3_sh_mask.h3352 #define UVD_RB_BASE_HI2__RB_BASE_HI_MASK … macro