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Searched refs:UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h749 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK … macro
H A Duvd_3_1_sh_mask.h621 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK 0xffffffff macro
H A Duvd_4_2_sh_mask.h627 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK 0xffffffff macro
H A Duvd_4_0_sh_mask.h604 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK 0xffffffffL macro
H A Duvd_5_0_sh_mask.h689 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK 0xffffffff macro
H A Duvd_6_0_sh_mask.h691 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK 0xffffffff macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1276 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK … macro
H A Dvcn_2_5_sh_mask.h2923 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK … macro
H A Dvcn_2_0_0_sh_mask.h2894 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3248 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK … macro
H A Dvcn_3_0_0_sh_mask.h4004 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK … macro
H A Dvcn_4_0_5_sh_mask.h4121 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK … macro
H A Dvcn_4_0_0_sh_mask.h4254 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK … macro
H A Dvcn_4_0_3_sh_mask.h4297 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR_MASK … macro