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Searched refs:UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h27 #define UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT … macro
H A Duvd_3_1_sh_mask.h738 #define UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT 0x0 macro
H A Duvd_4_2_sh_mask.h744 #define UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT 0x0 macro
H A Duvd_4_0_sh_mask.h585 #define UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT 0x00000000 macro
H A Duvd_5_0_sh_mask.h928 #define UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT 0x0 macro
H A Duvd_6_0_sh_mask.h916 #define UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT 0x0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h73 #define UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT … macro
H A Dvcn_2_5_sh_mask.h1513 #define UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h1510 #define UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h2951 #define UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h2047 #define UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT … macro
H A Dvcn_5_0_0_sh_mask.h5344 #define UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT … macro
H A Dvcn_4_0_5_sh_mask.h6167 #define UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h6340 #define UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h7144 #define UVD_POWER_STATUS__UVD_POWER_STATUS__SHIFT … macro