Searched refs:UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT (Results 1 – 18 of 18) sorted by relevance
| /linux/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_3_1_sh_mask.h | 468 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT 0x3 macro
|
| H A D | uvd_4_2_sh_mask.h | 472 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT 0x3 macro
|
| H A D | uvd_4_0_sh_mask.h | 487 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT 0x00000003 macro
|
| H A D | uvd_5_0_sh_mask.h | 504 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT 0x3 macro
|
| H A D | uvd_6_0_sh_mask.h | 506 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT 0x3 macro
|
| /linux/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_sh_mask.h | 1102 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT … macro
|
| H A D | vcn_2_5_sh_mask.h | 2830 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT … macro
|
| H A D | vcn_2_0_0_sh_mask.h | 2595 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT … macro
|
| H A D | vcn_2_6_0_sh_mask.h | 2821 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT … macro
|
| H A D | vcn_3_0_0_sh_mask.h | 3901 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT … macro
|
| H A D | vcn_4_0_5_sh_mask.h | 4018 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT … macro
|
| H A D | vcn_4_0_0_sh_mask.h | 4151 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT … macro
|
| H A D | vcn_4_0_3_sh_mask.h | 4190 #define UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT … macro
|
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vcn_v4_0_5.c | 917 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT, 0, indirect); in vcn_v4_0_5_start_dpg_mode()
1055 tmp |= 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT; in vcn_v4_0_5_start()
|
| H A D | vcn_v2_0.c | 882 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT, 0, indirect); in vcn_v2_0_start_dpg_mode()
1014 tmp |= 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT; in vcn_v2_0_start()
|
| H A D | vcn_v1_0.c | 867 tmp |= 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT; in vcn_v1_0_start_spg_mode()
1051 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT, 0xFFFFFFFF, 0); in vcn_v1_0_start_dpg_mode()
|
| H A D | vcn_v2_5.c | 911 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT, 0, indirect); in vcn_v2_5_start_dpg_mode()
1064 tmp |= 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT; in vcn_v2_5_start()
|
| H A D | vcn_v3_0.c | 1031 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT, 0, indirect); in vcn_v3_0_start_dpg_mode()
1194 tmp |= 0x2 << UVD_MPC_CNTL__REPLACEMENT_MODE__SHIFT; in vcn_v3_0_start()
|